Bob Wilson
c692cb77aa
Match VTRN, VZIP, and VUZP shuffles. Restore the tests for these operations,
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now using shuffles instead of intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79673 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-21 20:54:19 +00:00
Anton Korobeynikov
162da3c7b4
Add fcopysign instructions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79664 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-21 20:02:37 +00:00
Owen Anderson
9085750d31
Try again at privatizing the layout info map, with a rewritten patch.
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This preserves the existing behavior much more closely than my previous attempt.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79663 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-21 19:59:12 +00:00
Anton Korobeynikov
fc9489a4c6
Expand few nodes until someone will be crazy enough to implement them natively :)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79659 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-21 18:52:42 +00:00
Anton Korobeynikov
2a5b155ba8
Typo :(
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79657 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-21 18:41:02 +00:00
Anton Korobeynikov
324a99f395
Correct instruction names for subtract-with-borrow
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79656 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-21 18:37:28 +00:00
Anton Korobeynikov
3c2734c82b
Handle 'r' inline asm constraint
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79648 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-21 18:15:41 +00:00
Duncan Sands
1c3858a06c
Fix a problem noticed by gcc-4.4:
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warning: comparison is always true due to limited range of data type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79642 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-21 17:16:10 +00:00
Daniel Dunbar
e6c94c8d3a
Fix -Asserts warning.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79636 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-21 16:17:36 +00:00
Anton Korobeynikov
25f1aa04ff
Fix a typo
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79634 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-21 15:41:56 +00:00
Sanjiv Gupta
eaa8b1f81d
Add a pass to do call graph analyis to overlay the autos and frame sections of
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leaf functions. This pass will be extended to color other nodes of the call tree
as well in future.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79631 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-21 15:22:33 +00:00
Anton Korobeynikov
d083dfb60b
More cpp backend fixes. Now for FP stuff.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79626 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-21 12:50:54 +00:00
Anton Korobeynikov
051cfd683f
Fix some typos and use type-based isel for VZIP/VUZP/VTRN
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79625 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-21 12:41:42 +00:00
Anton Korobeynikov
1c8e581832
Add lowering of ARM 4-element shuffles to multiple instructios via perfectshuffle-generated table.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79624 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-21 12:41:24 +00:00
Anton Korobeynikov
62e84f177d
Add nodes & dummy matchers for some v{zip,uzp,trn} instructions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79622 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-21 12:40:50 +00:00
Anton Korobeynikov
8e6c2b9041
Expand EXTRACT_SUBVECTOR
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79621 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-21 12:40:35 +00:00
Anton Korobeynikov
5da894f5c4
Provide vext.{16,32}
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79620 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-21 12:40:21 +00:00
Anton Korobeynikov
d0ac234b1b
Use masks not nodes for vector shuffle predicates. Provide set of 'legal' masks, so legalizer won't infinite cycle
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79619 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-21 12:40:07 +00:00
Bill Wendling
9d7a8cc57e
Remove #include <iostream>.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79603 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-21 06:52:44 +00:00
Bob Wilson
d4b4cf524b
Remove Neon intrinsics for VZIP, VUZP, and VTRN. We will represent these as
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vector shuffles. Temporarily remove the tests for these operations until the
new implementation is working.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79579 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-21 00:01:42 +00:00
Owen Anderson
2ea20154ce
Re-revert r79555. Apparently it's not just buildbot weirdness.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79578 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-20 23:51:44 +00:00
Owen Anderson
28998d1806
Reapply r79555 for testing. Daniel's trying to work out some buildbot weirdnesss.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79572 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-20 23:14:20 +00:00
Bill Wendling
607abd262e
--- Reverse-merging r79555 into '.':
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U include/llvm/Target/TargetData.h
U lib/Target/TargetData.cpp
Temporarily revert 79555. It was causing hangs and test failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79568 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-20 22:04:42 +00:00
Sanjiv Gupta
89bc0a213d
part of the previous commit for PIC16 ISR implementation.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79563 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-20 19:34:18 +00:00
Sanjiv Gupta
eb01abaad1
Implement support for ISRs.
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Clone functions that are shared between the Main thread and Interrupt thread.
CallSites are changed in AsmPrinter currently. A better solution would have been to modify the legalizer (SoftenFloat) to allow targets to change the name of libcalls for float operations. But that currently breaks other targets.
Also, cloing of automatic variables is done AsmPrinter, a better approach would
be to use the ValueMap in CloneFunction itself.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79562 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-20 19:28:24 +00:00
Owen Anderson
d9b207122e
Make the StructType->StructLayout table private to TargetData, allowing us to avoid locking on it.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79555 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-20 18:26:03 +00:00
Sean Callanan
47234e6d38
Fixed PCMPESTRM128 to have opcode 0x60 instead of 0x62, as specified by the
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Intel documentation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79554 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-20 18:24:27 +00:00
Dan Gohman
ef74e9bf2a
Fix an x86 code size regression: prefer RIP-relative addressing
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over absolute addressing even in non-PIC mode (unless the address
has an index or something else incompatible), because it has a
smaller encoding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79553 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-20 18:23:44 +00:00
Evan Cheng
89d177f017
Fix an obvious copy-n-paste bug.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79535 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-20 17:01:04 +00:00
Dan Gohman
d35626e8bb
Update and fix some comments.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79532 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-20 16:27:10 +00:00
Dale Johannesen
231843ed16
Add an extra line to conform with preferred style.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79495 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-19 23:44:01 +00:00
Reid Kleckner
ce4eb39bb4
Modify an assert to avoid what looks like a GCC 4.2.4 signed-ness bug.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79494 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-19 23:39:59 +00:00
Dale Johannesen
7bcec7e541
Handle 'a' modifier in X86 asms. PR 4742.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79484 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-19 22:44:41 +00:00
Reid Kleckner
781c2b8c49
Fixed error in CPPBackend from a contextification API change.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79483 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-19 22:38:37 +00:00
Dan Gohman
6bd4aca29f
Remove temporary testing code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79443 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-19 18:27:08 +00:00
Dan Gohman
6a402dc952
Add an x86 peep that narrows TEST instructions to forms that use
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a smaller encoding. These kinds of patterns are very frequent in
sqlite3, for example.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79439 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-19 18:16:17 +00:00
David Goodwin
5d598aaf3d
Update Cortex-A8 instruction itineraries for integer instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79436 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-19 18:00:44 +00:00
Bob Wilson
de95c1b88b
Add support for Neon VEXT (vector extract) shuffles.
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This is derived from a patch by Anton Korzh. I modified it to recognize
the VEXT shuffles during legalization and lower them to a target-specific
DAG node.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79428 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-19 17:03:43 +00:00
Chris Lattner
6c2f9e14fd
eliminate AsmPrinter::SwitchToSection and just have clients
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talk to the MCStreamer directly instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79405 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-19 05:49:37 +00:00
Eric Christopher
b120ab4057
Implement sse4.2 string/text processing instructions:
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Add patterns and instruction encoding information.
Add custom lowering to deal with hardwired return register of
uncertain type (xmm0).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79377 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-18 22:50:32 +00:00
Jakob Stoklund Olesen
c0823fe7c6
Simplify RegScavenger::FindUnusedReg.
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- Drop the Candidates argument and fix all callers. Now that RegScavenger
tracks available registers accurately, there is no need to restict the
search.
- Make sure that no aliases of the found register are in use. This was a potential bug.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79369 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-18 21:14:54 +00:00
Richard Osborne
1123135dbf
Add support for mergeable sections back into the XCore backend.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79368 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-18 21:14:31 +00:00
Richard Osborne
a9e8334877
Put data with relocations in the same sections as data without relocations.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79351 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-18 17:58:17 +00:00
Chris Lattner
35c3531754
fix COFF targets (mingw/cygwin) to provide ehframe and LSDA sections
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79346 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-18 16:56:17 +00:00
Anton Korobeynikov
848c293962
Text sections should have 'exec' flag set. This seems to unbreak libstdc++ on linux.
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Patch by Dmitry Gorbachev!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79334 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-18 14:06:12 +00:00
Chris Lattner
090d73c6bd
remove some pointless null switchtosections. The IntelAsmPrinter doesn't really work anyway.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79321 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-18 06:03:07 +00:00
Evan Cheng
51f39961c3
Fix revsh pattern.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79318 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-18 05:43:23 +00:00
Chris Lattner
79e6408ad3
add support for some targetflags on GV operands. This allows us to
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send instructions like:
NEW: movl "L___stack_chk_guard$non_lazy_ptr" - "L1$pb"(%esi), %eax
OLD: movl L___stack_chk_guard$non_lazy_ptr-"L1$pb"(%esi), %eax
through the streamer. Several fixmes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79317 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-18 05:33:27 +00:00
Dan Gohman
25103a2617
Fix function alignment at -Os on x86 to be 1, not 2. getFunctionAlignment
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returns a log2 value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79293 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-18 00:20:06 +00:00
Dale Johannesen
5cfd4ddece
PowerPC inline asm was emitting two output operands
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for a single "m" constraint; this is wrong because the
opcode of a load or store would have to change in parallel.
This patch makes it always compute addresses into a register,
which is correct but not as efficient as possible. 7144566.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79292 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-18 00:18:39 +00:00