Bob Wilson
2003bcfbd2
Expand ZERO_EXTEND operations for NEON vector types.
...
Testcase from Nick Lewycky.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111341 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-18 01:45:52 +00:00
Eric Christopher
68c23f8616
Temporarily revert r110987 as it's causing some miscompares in
...
vector heavy code. I'll re-enable when we've tracked down the problem.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111318 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-17 22:55:27 +00:00
Dan Gohman
bbc1da8ded
Tweak IVUsers' concept of "interesting" to exclude add recurrences
...
where the step value is an induction variable from an outer loop, to
avoid trouble trying to re-expand such expressions. This effectively
hides such expressions from indvars and lsr, which prevents them
from getting into trouble.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111317 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-17 22:50:37 +00:00
Evan Cheng
b9072fdaad
Add nounwind.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111312 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-17 22:35:20 +00:00
Dale Johannesen
6cf64a631a
Make fast scheduler handle asm clobbers correctly.
...
PR 7882. Follows suggestion by Amaury Pouly, thanks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111306 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-17 22:17:24 +00:00
Anton Korobeynikov
d7343ddce5
Add some win64 coff goodness.
...
Patch by Cameron Esfahani!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111287 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-17 21:05:54 +00:00
Dan Gohman
fc8042a122
When rotating loops, put the original header at the bottom of the
...
loop, making the resulting loop significantly less ugly. Also, zap
its trivial PHI nodes, since it's easy.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111255 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-17 17:39:21 +00:00
Bob Wilson
f955f290c9
Change ARM PKHTB and PKHBT instructions to use a shift_imm operand to avoid
...
printing "lsl #0 ". This fixes the remaining parts of pr7792. Make
corresponding changes for encoding/decoding these instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111251 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-17 17:23:19 +00:00
Bob Wilson
7aaf5bf3db
Allow more cases of undef shuffle indices and add tests for them.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111226 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-17 05:54:34 +00:00
Evan Cheng
97b9b97853
PHI elimination should not break back edge. It can cause some significant code placement issues. rdar://8263994
...
good:
LBB0_2:
mov r2, r0
. . .
mov r1, r2
bne LBB0_2
bad:
LBB0_2:
mov r2, r0
. . .
@ BB#3:
mov r1, r2
b LBB0_2
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111221 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-17 01:20:36 +00:00
Bob Wilson
8f58a2e8e1
Add a testcase for svn 111208.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111212 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-16 23:44:29 +00:00
Bob Wilson
dc66edaced
Generalize a pattern for PKHTB: an SRL of 16-31 bits will guarantee
...
that the high halfword is zero. The shift need not be exactly 16 bits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111196 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-16 22:26:55 +00:00
Bob Wilson
b05b80160a
Convert test to FileCheck.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111195 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-16 22:21:13 +00:00
Bob Wilson
e269ead8c6
Convert a test to use FileCheck.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111153 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-16 17:05:27 +00:00
Dan Gohman
7a4994356b
Instead, teach SimplifyCFG to trim non-address-taken blocks from
...
indirectbr destination lists.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111122 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-16 14:41:14 +00:00
Dan Gohman
9883b95a2b
Revert r111058, the lint check for indirectbr successors that aren't
...
address-taken. This can occur normally, if the code which took the
address got DCEd.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111121 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-16 14:39:19 +00:00
Benjamin Kramer
bde87c4d2a
Test expects SSE, give him SSE.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111115 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-15 23:32:03 +00:00
Benjamin Kramer
1d81e0eed3
Restore arch on these test, they fail on arm.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111109 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-15 20:42:56 +00:00
Dale Johannesen
a01818c292
Mark as XFAIL on darwin 8. PR 7886.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111108 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-15 19:40:29 +00:00
Mikhail Glushenkov
0b63f37865
Update tests.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111096 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-15 07:07:24 +00:00
Dan Gohman
c2f40066bb
LoopSimplify shouldn't split loop backedges that use indirectbr. PR7867.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111061 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-14 00:43:09 +00:00
Dan Gohman
e2c6d131d1
Teach SimplifyCFG how to simplify indirectbr instructions.
...
- Eliminate redundant successors.
- Convert an indirectbr with one successor into a direct branch.
Also, generalize SimplifyCFG to be able to be run on a function entry block.
It knows quite a few simplifications which are applicable to the entry
block, and it only needs a few checks to avoid trouble with the entry block.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111060 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-14 00:29:42 +00:00
Dan Gohman
61556e3a94
Add a lint check for an indirectbr destination which has not
...
had its address taken.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111058 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-13 23:56:28 +00:00
Bob Wilson
20d8e4e7aa
Add a Thumb2 t2RSBrr instruction for disassembly only.
...
This fixes another part of PR7792.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111057 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-13 23:24:25 +00:00
Bob Wilson
703af3ab12
Temporarily disable tail calls on ARM to work around some linker problems.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111050 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-13 22:43:33 +00:00
Bob Wilson
38aa2871fc
Move the Thumb2 SSAT and USAT optional shift operator out of the
...
instruction opcode. This fixes part of PR7792.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111047 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-13 21:48:10 +00:00
Dale Johannesen
1b4051095d
Revert 110491. While not wrong, it was based on a
...
misanalysis and is undesirable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111028 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-13 18:43:45 +00:00
Mikhail Glushenkov
d6b33a7f31
One more XFAIL.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111010 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-13 07:03:56 +00:00
Mikhail Glushenkov
4964de420d
More XFAILs.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111008 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-13 07:01:55 +00:00
Mikhail Glushenkov
2e58b0055d
Add an XFAIL.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111004 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-13 04:15:45 +00:00
Mikhail Glushenkov
eb6ed3f89d
Remove -fexceptions from llvmc tests.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110999 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-13 02:29:35 +00:00
Mikhail Glushenkov
2e027cb6ed
llvmc: fix two tests, remove XFAILs.
...
Tested on Linux and Darwin; please add platform-specific XFAILs/mail me a bug
report if this still fails.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110998 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-13 02:29:24 +00:00
Nate Begeman
7f1f4089a1
Reapply this transformation now that it is passing the external test which it previously failed.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110987 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-13 00:17:53 +00:00
Chris Lattner
1522ce9770
fix PR7876: If ipsccp decides that a function's address is taken
...
before it rewrites the code, we need to use that in the post-rewrite pass.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110962 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-12 22:25:23 +00:00
Johnny Chen
1adc40cac3
Cleaned up the for-disassembly-only entries in the arm instruction table so that
...
the memory barrier variants (other than 'SY' full system domain read and write)
are treated as one instruction with option operand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110951 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-12 20:46:17 +00:00
Bruno Cardoso Lopes
642eb02045
- Teach SSEDomainFix to switch between different levels of AVX instructions. Here we guess that AVX will have domain issues, so just implement them for consistency and in the future we remove if it's unnecessary.
...
- Make foldMemoryOperandImpl aware of 256-bit zero vectors folding and support the 128-bit counterparts of AVX too.
- Make sure MOV[AU]PS instructions are only selected when SSE1 is enabled, and duplicate the patterns to match AVX.
- Add a testcase for a simple 128-bit zero vector creation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110946 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-12 20:20:53 +00:00
Bob Wilson
a825a634be
Add a test for llvm-gcc svn 110632.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110935 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-12 17:31:41 +00:00
Eric Christopher
7486278900
Temporarily revert 110737 and 110734, they were causing failures
...
in an external testsuite.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110905 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-12 07:01:22 +00:00
Bruno Cardoso Lopes
8c05a850f4
Begin to support some vector operations for AVX 256-bit intructions. The long
...
term goal here is to be able to match enough of vector_shuffle and build_vector
so all avx intrinsics which aren't mapped to their own built-ins but to
shufflevector calls can be codegen'd. This is the first (baby) step, support
building zeroed vectors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110897 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-12 02:06:36 +00:00
Johnny Chen
270159fcc2
The autogened decoder was confusing the ARM STRBT for ARM USAT, because the .td
...
entry for ARM STRBT is actually a super-instruction for A8.6.199 STRBT A1 & A2.
Recover by looking for ARM:USAT encoding pattern before delegating to the auto-
gened decoder.
Added a "usat" test case to arm-tests.txt.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110894 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-12 01:40:54 +00:00
Daniel Dunbar
09062b1672
MC/X86/AsmParser: Give an explicit error message when we reject an instruction
...
because it could have an ambiguous suffix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110890 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-12 00:55:42 +00:00
Devang Patel
fd56f3c91a
This is x86 only test.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110887 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-12 00:17:38 +00:00
Johnny Chen
7def14f40f
Changed the format of DMBsy, DSBsy, and friends from Pseudo to MiscFrm.
...
Added two test cases to arm-tests.txt.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110880 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-11 23:35:12 +00:00
Bob Wilson
eaf1c98a7c
Move the ARM SSAT and USAT optional shift amount operand out of the
...
instruction opcode. This also fixes part of PR7792.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110875 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-11 23:10:46 +00:00
Bruno Cardoso Lopes
4fd393cc26
Add testcases for all AVX 256-bit intrinsics added in the last couple days
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110854 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-11 21:12:09 +00:00
Bruno Cardoso Lopes
1d72aeebf9
Reapply r109881 using a more strict command line for llc.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110833 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-11 17:39:23 +00:00
Jim Grosbach
b5aa11f2d6
fix silly typo
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110831 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-11 17:32:46 +00:00
Jim Grosbach
7166e622d7
Add a target triple, as the runtime library invocation varies a bit by
...
platform. It's apparently "bl __muldf3" on linux, for example. Since that's
not what we're checking here, it's more robust to just force a triple. We
just wwant to check that the inline FP instructions are only generated
on cpus that have them."
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110830 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-11 17:31:12 +00:00
Evan Cheng
e1f0859789
Fix test and re-enable it.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110829 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-11 17:25:51 +00:00
Dan Gohman
3cc5d13f58
Temporarily disable some failing tests, until they can be
...
properly investigated.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110825 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-11 16:36:07 +00:00