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cb648f90a2
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864 Commits

Author SHA1 Message Date
Dan Gohman
cb648f90a2 Remove spurious consts. This fixes warnings with compilers that 
are strict about such things.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41956 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-14 20:08:19 +00:00
Evan Cheng
85dbe1a1d2 Initial support for multi-result patterns: 
1.
[(set GR32:$dst, (add GR32:$src1, GR32:$src2)),
 (modify EFLAGS)]
This indicates the source pattern expects the instruction would produce 2 values. The first is the result of the addition. The second is an implicit definition in register EFLAGS.
2.
def : Pat<(parallel (addc GR32:$src1, GR32:$src2), (modify EFLAGS)), ()>
Similar to #1 except this is used for def : Pat patterns.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41897 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-12 23:30:14 +00:00
Evan Cheng
aeb7d4d760 Allow set operators with multiple destinations, i.e. (set x, y, (op a, b)). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41861 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-11 19:52:18 +00:00
Evan Cheng
ef61ed3507 TableGen no longer emit CopyFromReg nodes for implicit results in physical 
registers. The scheduler is now responsible for emitting them.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41781 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-07 23:59:02 +00:00
Evan Cheng
425e8c7eae Always check the type of node. This prevents situations such as selecting 32-bit rotate target instruction for a 64-bit node when 64-bit pattern is missing. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41710 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-04 20:18:28 +00:00
Dan Gohman
0fee3ff93e Add MVT::fAny for overloading intrinsics on floating-point types. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41128 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-16 21:57:19 +00:00
Rafael Espindola
594d37e21a propagate struct size and alignment of byval arguments to the DAG 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40986 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-10 14:44:42 +00:00
Chandler Carruth
a583990ec8 This resolves a regression of BasicAA which failed to find any memory information for overloaded intrinsics (PR1600). This resolves that issue, and improves the matching scheme to use a BitVector rather than a binary search. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40872 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-06 20:57:16 +00:00
Chandler Carruth
6994040a95 This is the patch to provide clean intrinsic function overloading support in LLVM. It cleans up the intrinsic definitions and generally smooths the process for more complicated intrinsic writing. It will be used by the upcoming atomic intrinsics as well as vector and float intrinsics in the future. 
This also changes the syntax for llvm.bswap, llvm.part.set, llvm.part.select, and llvm.ct* intrinsics. They are automatically upgraded by both the LLVM ASM reader and the bitcode reader. The test cases have been updated, with special tests added to ensure the automatic upgrading is supported.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40807 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-04 01:51:18 +00:00
Evan Cheng
b5910820ce Added TargetInstrDescriptor::numDefs - num of results. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40709 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-02 00:20:17 +00:00
Dan Gohman
f452207d20 More explicit keywords. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40589 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-30 14:51:59 +00:00
Chuck Rose III
936baaa5ae VStudio compiler errors and placing Function*->ExFunc map under ManagedStatic control. 
This commit fixes two things.  One is a pair of VStudio compiler errors stemming from variables
which defined within the for loop statement and also within the body of the for loop.  I fixed these 
by renaming one of the two variables.  Additionally, I've made the Function*->ExFunc map in 
ExternalFunctions.cpp a ManagedStatic object, so that cleanup will be done on llvm_shutdown.  In repeated
uses of the interpreter, where the same Function* address may get used for completely differnet functions,
this was causing a crash.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40558 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-27 18:26:35 +00:00
Dan Gohman
face9e56a1 Fix a pasto in a comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40527 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-26 15:11:00 +00:00
Christopher Lamb
1367fd09cb Have register info provide the inverse mapping of register->superregisters. PR1350 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40519 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-26 08:01:58 +00:00
Christopher Lamb
08d52071ba Add target independent MachineInstr's to represent subreg insert/extract in MBB's. PR1350 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40518 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-26 07:48:21 +00:00
Christopher Lamb
8245510ae0 Teach TableGen about the new vector types. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40513 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-26 06:41:18 +00:00
Dan Gohman
a6a1ab3d28 A minor simplication in the generated code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40479 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-24 22:58:00 +00:00
Evan Cheng
102dc195b6 No need for noResults anymore. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40075 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-20 00:21:23 +00:00
Evan Cheng
64d80e3387 Change instruction description to split OperandList into OutOperandList and 
InOperandList. This gives one piece of important information: # of results
produced by an instruction.
An example of the change:
def ADD32rr  : I<0x01, MRMDestReg, (ops GR32:$dst, GR32:$src1, GR32:$src2),
                 "add{l} {$src2, $dst|$dst, $src2}",
                 [(set GR32:$dst, (add GR32:$src1, GR32:$src2))]>;
=>
def ADD32rr  : I<0x01, MRMDestReg, (outs GR32:$dst), (ins GR32:$src1, GR32:$src2),
                 "add{l} {$src2, $dst|$dst, $src2}",
                 [(set GR32:$dst, (add GR32:$src1, GR32:$src2))]>;


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40033 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-19 01:14:50 +00:00
Chris Lattner
ad8c531e20 Work around a bogus gcc 4.2 warning. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@39993 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-18 04:51:57 +00:00
Dan Gohman
3bf6e183d5 Eliminate an unused parameter. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@39828 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-13 20:16:50 +00:00
Evan Cheng
88cc092ca5 Try committing again. Add OptionalDefOperand. Remove clobbersPred. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@38498 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-10 18:05:01 +00:00
Evan Cheng
c419bd3396 ImmutablePredicateOperand is no more. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37963 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-06 23:23:38 +00:00
Rafael Espindola
1aa7efbd2c Add the byval attribute 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37940 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-06 10:57:03 +00:00
Evan Cheng
a955939ca2 Refactor code to add initial support for OptionalDefOperand. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37933 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-06 01:05:26 +00:00
Evan Cheng
7774be4a74 Teach DAGISelEmitter about zero_reg. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37900 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-05 07:19:45 +00:00
Evan Cheng
8012b077dd Instructions with ImmutablePredicateOperand aren't really predicable since their predicates are fixed at isel time. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37899 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-05 07:19:29 +00:00
John Criswell
e644ef7b09 Convert .cvsignore files 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37801 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-06-29 16:35:07 +00:00
Evan Cheng
5e4f292e53 One additional field in TargetRegisterDesc. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37760 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-06-27 17:09:34 +00:00
Evan Cheng
c4f2fe0694 Add immediate sub-registers. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37738 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-06-26 20:59:16 +00:00
Dan Gohman
d45eddd214 Revert the earlier change that removed the M_REMATERIALIZABLE machine 
instruction flag, and use the flag along with a virtual member function
hook for targets to override if there are instructions that are only
trivially rematerializable with specific operands (i.e. constant pool
loads).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37728 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-06-26 00:48:07 +00:00
Dan Gohman
9a0930dbd9 Fix a typo in a comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37727 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-06-26 00:43:18 +00:00
Chris Lattner
20c2b35c2f silence warning when assertions are disabled. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37654 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-06-19 06:40:46 +00:00
Dan Gohman
82a87a0172 Replace M_REMATERIALIZIBLE and the newly-added isOtherReMaterializableLoad 
with a general target hook to identify rematerializable instructions. Some
instructions are only rematerializable with specific operands, such as loads
from constant pools, while others are always rematerializable. This hook
allows both to be identified as being rematerializable with the same
mechanism.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37644 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-06-19 01:48:05 +00:00
Evan Cheng
eaa91b0a1f Replace TargetInstrInfo::CanBeDuplicated() with a M_NOT_DUPLICABLE bit. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37643 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-06-19 01:26:51 +00:00
Christopher Lamb
a321125e8b Add support to tablegen for specifying subregister classes on a per register class basis. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37572 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-06-13 22:20:15 +00:00
Evan Cheng
b5c1c9c8e3 Add clobbersPred - instruction that clobbers condition code / register which are used to predicate instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37465 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-06-06 10:14:55 +00:00
Bill Wendling
851879c4cf Patches by Chuck Rose to unbreak V Studio builds. 
Thanks Chuck!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37428 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-06-04 23:52:59 +00:00
Dan Gohman
b9daee9ece Remove the operator<< for MVT::ValueType in preparation for MVT::ValueType 
being changed from an enum to an integer type, which can't have a custom
operator<< overload.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37412 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-06-04 16:11:03 +00:00
Reid Spencer
84c614d1ac The Intrinsic::getDeclaration function's Tys parameter only contains the 
types of the iAny types involved in the overloaded intrinsic. Thus, we
can't use the argument number as the index but have to count them separately
in order to index Tys correctly. This patch rectifies this situation.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37296 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-22 19:30:31 +00:00
Evan Cheng
5127ce09a4 Rename M_PREDICATED to M_PREDICABLE; opcode can be specified isPredicable without having a PredicateOperand. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37116 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-16 20:45:24 +00:00
Chris Lattner
4ef9b11100 Fix CodeGen/PowerPC/2007-05-14-InlineAsmSelectCrash.ll, the other recent 
patches are also needed.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37070 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-15 01:36:44 +00:00
Evan Cheng
30d15757e3 Added \!con(a,b) syntax to concatnate two dag fragments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37063 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-15 01:23:24 +00:00
Evan Cheng
3ab6dcfc54 Mark all (not just the first) predicate operand M_PREDICATE_OPERAND. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37061 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-15 01:20:36 +00:00
Evan Cheng
39376d0843 PredicateOperand related bug fix. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37060 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-15 01:19:51 +00:00
Evan Cheng
59039632e1 If a PredicateOperand has an empty ExecuteAlways field, treat it as if a normal operand for isel. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36946 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-08 21:04:07 +00:00
Bill Wendling
4222d806fa Add an "implies" field to features. This indicates that, if the current 
feature is set, then the features in the implied list should be set also.
The opposite is also enforced: if a feature in the implied list isn't set,
then the feature that owns that implies list shouldn't be set either.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36756 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-04 20:38:40 +00:00
Nate Begeman
6f7c8ffd9a A bit of feedback from Chris that I missed; error rather than asserting. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36619 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-01 06:08:36 +00:00
Nate Begeman
7bf1c272ab llvm bug #1350, parts 1, 2, and 3. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36618 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-01 05:57:02 +00:00
Dan Gohman
01929c0482 Update a comment to reflect recent changes in the type system. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36486 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-26 19:43:14 +00:00