Commit Graph

75850 Commits

Author SHA1 Message Date
Chandler Carruth
d09c0db8a9 [PM] Lift the analyses into the interface for
SplitLandingPadPredecessors and remove the Pass argument from its
interface.

Another step to the utilities being usable with both old and new pass
managers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226426 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-19 03:03:39 +00:00
David Blaikie
5f16ba708b unique_ptrify the RelInfo parameter to TargetRegistry::createMCSymbolizer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226416 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-18 20:45:48 +00:00
David Blaikie
341a7e245e std::unique_ptrify the MCStreamer argument to createAsmPrinter
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226414 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-18 20:29:04 +00:00
Hal Finkel
341223ee0a [PowerPC] Don't hard-code R2 as register when processing TOC relocations
Instructions that have high-order TOC relocations always carry R2 as their base
register, so it does not matter whether we take the register from the
instruction or just hard-code it in PPCAsmPrinter. In the future, however, we
might want to apply these relocations to instructions using a different
register, so taking the register from the instruction is a better thing to do.
No change in functionality here, however.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226403 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-18 15:59:44 +00:00
Hal Finkel
180f89537a [PowerPC] Add some FIXMEs for fastcc and FPR <-> GPR moves
So we don't forget, once we support FPR <-> GPR moves on the P8, we'll likely
want to re-visit this part of the calling convention.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226401 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-18 14:31:10 +00:00
Hal Finkel
a01b583dbc [PowerPC] Initial PPC64 calling-convention changes for fastcc
The default calling convention specified by the PPC64 ELF (V1 and V2) ABI is
designed to work with both prototyped and non-prototyped/varargs functions. As
a result, GPRs and stack space are allocated for every argument, even those
that are passed in floating-point or vector registers.

GlobalOpt::OptimizeFunctions will transform local non-varargs functions (that
do not have their address taken) to use the 'fast' calling convention.

When functions are using the 'fast' calling convention, don't allocate GPRs for
arguments passed in other types of registers, and don't allocate stack space for
arguments passed in registers. Other changes for the fast calling convention
may be added in the future.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226399 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-18 12:08:47 +00:00
Chandler Carruth
5817eaff8f [PM] Pull the analyses used for another utility routine into its API
rather than relying on the pass object.

This one is a bit annoying, but will pay off. First, supporting this one
will make the next one much easier, and for utilities like LoopSimplify,
this is moving them (slowly) closer to not having to pass the pass
object around throughout their APIs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226396 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-18 09:21:15 +00:00
Chandler Carruth
7478e27573 [PM] Sink the specific analyses preserved by SplitBlock into its
interface, removing Pass from its interface.

This also makes those analyses optional so that passes which don't even
preserve these (or use them) can skip the logic entirely.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226394 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-18 02:39:37 +00:00
Chandler Carruth
0389537c08 [PM] Replace another Pass argument with specific analyses that are
optionally updated by MergeBlockIntoPredecessors.

No functionality changed, just refactoring to clear the way for the new
pass manager.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226392 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-18 02:11:23 +00:00
Chandler Carruth
d39e52bef7 [PM] Refactor how the LoopRotation pass access the DominatorTree.
Instead of querying the pass every where we need to, do that once and
cache a pointer in the pass object. This is both simpler and I'm about
to add yet another place where we need to dig out that pointer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226391 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-18 02:08:05 +00:00
Chandler Carruth
b7f66977be [PM] Lift the actual analyses used into the inferface rather than
accepting a Pass and querying it for analyses.

This is necessary to allow the utilities to work both with the old and
new pass managers, and I also think this makes the interface much more
clear and helps the reader know what analyses the utility can actually
handle. I plan to repeat this process iteratively to clean up all the
pass utilities.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226386 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-18 01:45:07 +00:00
Chandler Carruth
5a2d01e5b8 [PM] Now that LoopInfo isn't in the Pass type hierarchy, it is much
cleaner to derive from the generic base.

Thise removes a ton of boiler plate code and somewhat strange and
pointless indirections. It also remove a bunch of the previously needed
friend declarations. To fully remove these, I also lifted the verify
logic into the generic LoopInfoBase, which seems good anyways -- it is
generic and useful logic even for the machine side.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226385 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-18 01:25:51 +00:00
Chandler Carruth
e81cec19db [PM] Cleanup more warnings my refactoring exposed where now we have
unused variables in a no-asserts build.

I've fixed this by putting the entire loop behind an #ifndef as it
contains nothing other than asserts.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226377 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-17 14:49:23 +00:00
Chandler Carruth
122e67cb34 [PM] Remove a dead field.
This was dead even before I refactored how we initialized it, but my
refactoring made it trivially dead and it is now caught by a Clang
warning. This fixes the warning and should clean up the -Werror bot
failures (sorry!).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226376 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-17 14:31:35 +00:00
Chandler Carruth
de5df29556 [PM] Split the LoopInfo object apart from the legacy pass, creating
a LoopInfoWrapperPass to wire the object up to the legacy pass manager.

This switches all the clients of LoopInfo over and paves the way to port
LoopInfo to the new pass manager. No functionality change is intended
with this iteration.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226373 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-17 14:16:18 +00:00
Hal Finkel
962cff0c08 [PowerPC] Don't list R11 as a patchpoint scratch register
R11's status is the same under both the PPC64 ELF V1 and V2 ABIs: it is
reserved for use as an "environment pointer" for compilation models that
require such a thing. We don't, we also don't need a second scratch register,
and because we support only "local" patchpoint call targets, we might as well
let R11 be used for anyregcc patchpoints.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226369 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-17 03:57:34 +00:00
Mehdi Amini
5eed637b34 Improve DAG combine pass on certain IR vector patterns
Loading 2 2x32-bit float vectors into the bottom half of a 256-bit vector
produced suboptimal code in AVX2 mode with certain IR combinations.

In particular, the IR optimizer folded 2f32 + 2f32 -> 4f32, 4f32 + 4f32
(undef) -> 8f32 into a 2f32 + 2f32 -> 8f32, which seems more canonical,
but then mysteriously generated rather bad code; the movq/movhpd combination
didn't match.

The problem lay in the BUILD_VECTOR optimization path. The 2f32 inputs
would get promoted to 4f32 by the type legalizer, eventually resulting
in a BUILD_VECTOR on two 4f32 into an 8f32. The BUILD_VECTOR then, recognizing
these were both half the output size, concatted them and then produced
a shuffle. However, the resulting concat + shuffle was more complex than
it should be; in the case where the upper half of the output is undef, we
probably want to generate shuffle + concat instead.

This enhancement causes the vector_shuffle combine step to recognize this
suboptimal pattern and correct it. I included it there instead of in BUILD_VECTOR
in case the same suboptimal pattern occurs for other reasons.

This results in the optimizer correctly producing the optimal movq + movhpd
sequence for all three variations on this IR, even with AVX2.

I've included a test case.

Radar link: rdar://problem/19287012
Fix for PR 21943.

From: Fiona Glaser <fglaser@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226360 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-17 01:35:56 +00:00
Lang Hames
f2a51a78f5 [RuntimeDyld] Tidy up emitCommonSymbols a little. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226358 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-17 00:55:05 +00:00
Richard Trieu
6cf3f3fceb Remove std::move that was preventing return value optimization.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226356 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-17 00:46:44 +00:00
Matthias Braun
0553dac91f RegisterCoalescer: Cleanup and improved comment for a subtle detail.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226353 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-17 00:33:13 +00:00
Matthias Braun
b26c2fc557 RegisterCoalescer: Cleanup by factoring out a common expression
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226352 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-17 00:33:11 +00:00
Matthias Braun
b8f5c8cb95 RegisterCoalescer: Cleanup comment style
- Consistenly put comments above the function declaration, not the
  definition. To achieve this some duplicate comments got merged and
  some comment parts describing implementation details got moved into their
  functions.
- Consistently use doxygen comments above functions.
- Do not use doxygen comments inside functions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226351 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-17 00:33:09 +00:00
Matthias Braun
07a087f45c RegisterCoalescer: Drive-by typo + whitespace fix
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226350 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-17 00:33:06 +00:00
Lang Hames
944d563647 [RuntimeDyld] Remove the brace initialization that was introduced in r226341.
Evidently MSVC doesn't like it.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226349 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-17 00:32:56 +00:00
Philip Reames
70e90cefd5 Update a comment
Be a bit more explicit about the fact that addrspace(1) is not reserved.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226344 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-16 23:21:07 +00:00
Philip Reames
999412767a clang-format all the GC related files (NFC)
Nothing interesting here...




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226342 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-16 23:16:12 +00:00
Lang Hames
61bd005d1b [RuntimeDyld] Track symbol visibility in RuntimeDyld.
RuntimeDyld symbol info previously consisted of just a Section/Offset pair. This
patch replaces that pair type with a SymbolInfo class that also tracks symbol
visibility. A new method, RuntimeDyld::getExportedSymbolLoadAddress, is
introduced which only returns a non-zero result for exported symbols. For
non-exported or non-existant symbols this method will return zero. The
RuntimeDyld::getSymbolAddress method retains its current behavior, returning
non-zero results for all symbols regardless of visibility.

No in-tree clients of RuntimeDyld are changed. The newly introduced
functionality will be used by the Orc APIs.

No test case: Since this patch doesn't modify the behavior for any in-tree
clients we don't have a good tool to test this with yet. Once Orc is in we can
use it to write regression tests that test these changes.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226341 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-16 23:13:56 +00:00
Kevin Enderby
57cc8ad672 Fix the Archive::Child::getRawSize() method used by llvm-objdump’s -archive-headers option
and tweak its use in llvm-objdump.  Add back the test case for the -archive-headers option.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226332 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-16 22:10:36 +00:00
Colin LeMahieu
d08a6cd083 [Hexagon] Converting halfword to doubleword multiply intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226326 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-16 21:41:57 +00:00
Colin LeMahieu
9a56f06825 [Hexagon] Converting accumulating halfword multiply intrinsics to patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226324 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-16 21:36:34 +00:00
Colin LeMahieu
67451fe320 [Hexagon] Beginning converting intrinsics to patterns instead of duplicated definitions. Converting halfword multiply intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226318 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-16 20:38:54 +00:00
Colin LeMahieu
6a1bcaf6ff [Hexagon] Fix 226309, replacement atomic store patterns didn't actually exist, added new versions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226315 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-16 20:16:14 +00:00
Saleem Abdulrasool
d4bdb4e0b2 X86: fix comment typo in AsmParser
Fix a typo.  NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226313 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-16 20:16:06 +00:00
Philip Reames
07fbc5c1c6 Move ownership of GCStrategy objects to LLVMContext
Note: This change ended up being slightly more controversial than expected.  Chandler has tentatively okayed this for the moment, but I may be revisiting this in the near future after we settle some high level questions.

Rather than have the GCStrategy object owned by the GCModuleInfo - which is an immutable analysis pass used mainly by gc.root - have it be owned by the LLVMContext. This simplifies the ownership logic (i.e. can you have two instances of the same strategy at once?), but more importantly, allows us to access the GCStrategy in the middle end optimizer. To this end, I add an accessor through Function which becomes the canonical way to get at a GCStrategy instance.

In the near future, this will allows me to move some of the checks from http://reviews.llvm.org/D6808 into the Verifier itself, and to introduce optimization legality predicates for some of the recent additions to InstCombine. (These will follow as separate changes.)

Differential Revision: http://reviews.llvm.org/D6811



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226311 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-16 20:07:33 +00:00
Colin LeMahieu
9da6e03161 [Hexagon] Removing old duplicate atomic load/store patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226309 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-16 19:53:35 +00:00
Philip Reames
8a660bd822 Remove gc.root's findCustomSafePoints mechanism
Searching all of the existing gc.root implementations I'm aware of (all three of them), there was exactly one use of this mechanism, and that was to implement a performance improvement that should have been applied to the default lowering.

Having this function is requiring a dependency on a CodeGen class (MachineFunction), in a class which is otherwise completely independent of CodeGen. I could solve this differently, but given that I see absolutely no value in preserving this mechanism, I going to just get rid of it.

Note: Tis is the first time I'm intentionally breaking previously supported gc.root functionality. Given 3.6 has branched, I believe this is a good time to do this.

Differential Revision: http://reviews.llvm.org/D7004



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226305 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-16 19:33:28 +00:00
Colin LeMahieu
3cec3682bb [Hexagon] Converting old patterns to new versions using classes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226304 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-16 19:29:59 +00:00
Adam Nemet
ad2ac976af [AVX512] Add intrinsics for masked aligned FP loads and stores
Similar to the unaligned cases.

Test was generated with update_llc_test_checks.py.

Part of <rdar://problem/17688758>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226296 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-16 18:50:09 +00:00
Duncan P. N. Exon Smith
fb7514fccb IR: Allow 16-bits for column info
Raise the limit for column information from 8 bits to 16 bits.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226291 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-16 17:33:08 +00:00
Duncan P. N. Exon Smith
44fb4b337f IR: Cleanup dead code, NFC
Line/column fixups already exist in `MDLocation`.  Delete the duplicated
logic in `DebugLoc`.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226290 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-16 17:31:29 +00:00
Colin LeMahieu
9fd1ca6c40 [Hexagon] Updating call/jump instruction patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226288 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-16 17:05:27 +00:00
Andrea Di Biagio
ac7b9c828f [X86][DAG] Disable target specific combine on INSERTPS dag nodes at -O0.
This patch disables target specific combine on X86ISD::INSERTPS dag nodes
if optlevel is CodeGenOpt::None.

The backend currently implements a target specific combine rule that converts
a vector load used by an INSERTPS dag node into a scalar load plus a
scalar_to_vector. This allows ISel to select a single INSERTPSrm instead of
two instructions (i.e. a vector load plus INSERTPSrr).

However, the existing target combine rule on INSERTPS nodes only works under
the assumption that ISel will always be able to match an INSERTPSrm. This is
not true in general at -O0, since the backend only allows folding a load into
the memory operand of an instruction if the optimization level is not
CodeGenOpt::None.

In the example below:

//
__m128 test(__m128 a, __m128 *b) {
  __m128 c = _mm_insert_ps(a, *b, 1 << 6);
  return c;
}
//

Before this patch, at -O0, the backend would have canonicalized the load to 'b'
into a scalar load plus scalar_to_vector. Later on, ISel would have selected an
INSERTPSrr leaving the insertps mask in an inconsistent state:

  movss 4(%rdi), %xmm1
  insertps  $64, %xmm1, %xmm0 # xmm0 = xmm1[1],xmm0[1,2,3].

With this patch, the backend avoids folding the vector load into the operand of
the INSERTPS. The new codegen at -O0 is:

  movaps (%rdi), %xmm1
  insertps  $64, %xmm1, %xmm0 # %xmm1[1],xmm0[1,2,3].


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226277 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-16 14:55:26 +00:00
Toma Tabacu
ca2812cfc6 [mips] Remove a redundant semicolon and add space before curly brackets. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226269 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-16 10:45:15 +00:00
Timur Iskhodzhanov
6a7c74de33 Revert r226242 - Revert Revert Don't create new comdats in CodeGen
This breaks AddressSanitizer (ninja check-asan) on Windows

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226251 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-16 08:38:45 +00:00
Hal Finkel
92cd0ca3b2 [PowerPC] Adjust PatchPoints for ppc64le
Bill Schmidt pointed out that some adjustments would be needed to properly
support powerpc64le (using the ELF V2 ABI). For one thing, R11 is not available
as a scratch register, so we need to use R12. R12 is also available under ELF
V1, so to maintain consistency, I flipped the order to make R12 the first
scratch register in the array under both ABIs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226247 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-16 04:40:58 +00:00
Mehdi Amini
525f296ef1 Fix Reassociate handling of constant in presence of undef float
http://reviews.llvm.org/D6993

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226245 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-16 03:00:58 +00:00
Rafael Espindola
dfe88a08c7 Revert "Revert Don't create new comdats in CodeGen"
This reverts commit r226173, adding r226038 back.

No change in this commit, but clang was changed to also produce trivial comdats for
costructors, destructors and vtables when needed.

Original message:

Don't create new comdats in CodeGen.

This patch stops the implicit creation of comdats during codegen.

Clang now sets the comdat explicitly when it is required. With this patch clang and gcc
now produce the same result in pr19848.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226242 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-16 02:22:55 +00:00
Sanjoy Das
148e8c9b8b Add a new pass "inductive range check elimination"
IRCE eliminates range checks of the form

  0 <= A * I + B < Length

by splitting a loop's iteration space into three segments in a way
that the check is completely redundant in the middle segment.  As an
example, IRCE will convert

  len = < known positive >
  for (i = 0; i < n; i++) {
    if (0 <= i && i < len) {
      do_something();
    } else {
      throw_out_of_bounds();
    }
  }

to

  len = < known positive >
  limit = smin(n, len)
  // no first segment
  for (i = 0; i < limit; i++) {
    if (0 <= i && i < len) { // this check is fully redundant
      do_something();
    } else {
      throw_out_of_bounds();
    }
  }
  for (i = limit; i < n; i++) {
    if (0 <= i && i < len) {
      do_something();
    } else {
      throw_out_of_bounds();
    }
  }


IRCE can deal with multiple range checks in the same loop (it takes
the intersection of the ranges that will make each of them redundant
individually).

Currently IRCE does not do any profitability analysis.  That is a
TODO.

Please note that the status of this pass is *experimental*, and it is
not part of any default pass pipeline.  Having said that, I will love
to get feedback and general input from people interested in trying
this out.

This pass was originally r226201.  It was reverted because it used C++
features not supported by MSVC 2012.

Differential Revision: http://reviews.llvm.org/D6693



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226238 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-16 01:03:22 +00:00
Kevin Enderby
5d80532925 This should fix the build bot clang-cmake-armv7-a15-full failing on
the macho-archive-headers.test added with r226228.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226232 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-16 00:27:31 +00:00
Matt Arsenault
ab2315014e R600/SI: Add patterns for v_cvt_{flr|rpi}_i32_f32
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226230 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-15 23:58:35 +00:00