Commit Graph

23250 Commits

Author SHA1 Message Date
Elena Demikhovsky
4eb165220f AVX-512: intrinsics for VPADD, VPMULDQ and VPSUB
by Asaf Badouh (asaf.badouh@intel.com)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233906 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-02 10:51:40 +00:00
Peter Collingbourne
a8432640e8 Revert r233595, "MC: For variable symbols, maintain MCSymbol::Section as a cache."
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233898 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-02 07:02:51 +00:00
Philip Reames
57bea4161b [gcroot] Remove unused items from an enum
These two were never implemented for gcroot, so there's no point in keeping them around now.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233892 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-02 05:02:16 +00:00
Sanjoy Das
a5b863c29b [ADT] Increment epoch from DenseMap::swap.
Swapping DenseMap A with DenseMap B invalidates iterators pointing into
both A and B.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233890 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-02 04:58:12 +00:00
Sanjoy Das
b7589c8b1b [ADT] Remove dead code.
Nothing is using DenseMapBase::swap.  Besides it does not compile in its
current form.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233889 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-02 04:58:08 +00:00
Lang Hames
14ef491582 [Orc] Add support classes for inspecting and running C++ static ctor/dtors, and
use these to add support for C++ static ctors/dtors to the Orc-lazy JIT in LLI.

Replace the trivial_retval_1 regression test - the new 'hello' test is covering
strictly more code. 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233885 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-02 04:34:45 +00:00
Daniel Berlin
8ce5d8e3e7 Mark this inline properly
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233870 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-02 00:03:15 +00:00
Daniel Berlin
525a9598d6 Return iterator from Instruction::eraseFromParent.
Summary:
This is necessary in order to make removal while using reverse iterators work.

(See http://lists.cs.uiuc.edu/pipermail/llvmdev/2015-March/084122.html)

Updates to other eraseFromParent's to come in later patches.

Reviewers: chandlerc

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D8783

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233869 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-02 00:03:07 +00:00
Matthias Braun
a8d688454d Remove declarations for nonexistent methods
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233841 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-01 21:16:02 +00:00
Sanjoy Das
5436372079 [SCEV] Look at backedge dominating conditions (re-land r233447).
Summary:
This change teaches ScalarEvolution::isLoopBackedgeGuardedByCond to look
at edges within the loop body that dominate the latch.  We don't do an
exhaustive search for all possible edges, but only a quick walk up the
dom tree.

This re-lands r233447.  r233447 was reverted because it caused massive
compile-time regressions.  This change has a fix for the same issue.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233829 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-01 18:24:06 +00:00
Diego Novillo
32d9020423 Remove 4,096 loop scale limitation.
Summary:
This is part 1 of fixes to address the problems described in
https://llvm.org/bugs/show_bug.cgi?id=22719.

The restriction to limit loop scales to 4,096 does not really prevent
overflows anymore, as the underlying algorithm has changed and does
not seem to suffer from this problem.

Additionally, artificially restricting loop scales to such a low number
skews frequency information, making loops of equal hotness appear to
have very different hotness properties.

The only loops that are artificially restricted to a scale of 4096 are
infinite loops (those loops with an exit mass of 0). This prevents
infinite loops from skewing the frequencies of other regions in the CFG.

At the end of propagation, frequencies are scaled to values that take no
more than 64 bits to represent. When the range of frequencies to be
represented fits within 61 bits, it pushes up the scaling factor to a
minimum of 8 to better distinguish small frequency values. Otherwise,
small frequency values are all saturated down at 1.

Tested on x86_64.

Reviewers: dexonsmith

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D8718

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233826 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-01 17:42:27 +00:00
Ulrich Weigand
adf55a5a57 [SystemZ] Support transactional execution on zEC12
The zEC12 provides the transactional-execution facility.  This is exposed
to users via a set of builtin routines on other compilers.  This patch
adds LLVM support to enable those builtins.  In partciular, the patch:

- adds the transactional-execution and processor-assist facilities
- adds MC support for all instructions provided by those facilities
- adds LLVM intrinsics for those instructions and hooks them up for CodeGen
- adds CodeGen support to optimize CC return value checking

Since this is first use of target-specific intrinsics on the platform,
the patch creates the include/llvm/IR/IntrinsicsSystemZ.td file and
hooks it up in Intrinsics.td.  I've also changed Triple::getArchTypePrefix
to return "s390" instead of "systemz", since the naming convention for
GCC intrinsics uses "s390" on the platform, and it neemed more straight-
forward to use the same convention for LLVM IR intrinsics.

An associated clang patch makes the intrinsics (and command line switches)
available at the source-language level.

For reference, the transactional-execution instructions are documented
in the z/Architecture Principles of Operation for the zEC12:
http://publibfp.boulder.ibm.com/cgi-bin/bookmgr/download/DZ9ZR009.pdf
The associated builtins are documented in the GCC manual:
http://gcc.gnu.org/onlinedocs/gcc/S_002f390-System-z-Built-in-Functions.html


Index: llvm-head/lib/Target/SystemZ/SystemZOperators.td
===================================================================
--- llvm-head.orig/lib/Target/SystemZ/SystemZOperators.td
+++ llvm-head/lib/Target/SystemZ/SystemZOperators.td
@@ -79,6 +79,9 @@ def SDT_ZI32Intrinsic       : SDTypeProf
 def SDT_ZPrefetch           : SDTypeProfile<0, 2,
                                             [SDTCisVT<0, i32>,
                                              SDTCisPtrTy<1>]>;
+def SDT_ZTBegin             : SDTypeProfile<0, 2,
+                                            [SDTCisPtrTy<0>,
+                                             SDTCisVT<1, i32>]>;
 
 //===----------------------------------------------------------------------===//
 // Node definitions
@@ -180,6 +183,15 @@ def z_prefetch          : SDNode<"System
                                  [SDNPHasChain, SDNPMayLoad, SDNPMayStore,
                                   SDNPMemOperand]>;
 
+def z_tbegin            : SDNode<"SystemZISD::TBEGIN", SDT_ZTBegin,
+                                 [SDNPHasChain, SDNPOutGlue, SDNPMayStore,
+                                  SDNPSideEffect]>;
+def z_tbegin_nofloat    : SDNode<"SystemZISD::TBEGIN_NOFLOAT", SDT_ZTBegin,
+                                 [SDNPHasChain, SDNPOutGlue, SDNPMayStore,
+                                  SDNPSideEffect]>;
+def z_tend              : SDNode<"SystemZISD::TEND", SDTNone,
+                                 [SDNPHasChain, SDNPOutGlue, SDNPSideEffect]>;
+
 //===----------------------------------------------------------------------===//
 // Pattern fragments
 //===----------------------------------------------------------------------===//
Index: llvm-head/lib/Target/SystemZ/SystemZInstrFormats.td
===================================================================
--- llvm-head.orig/lib/Target/SystemZ/SystemZInstrFormats.td
+++ llvm-head/lib/Target/SystemZ/SystemZInstrFormats.td
@@ -473,6 +473,17 @@ class InstSS<bits<8> op, dag outs, dag i
   let Inst{15-0}  = BD2;
 }
 
+class InstS<bits<16> op, dag outs, dag ins, string asmstr, list<dag> pattern>
+  : InstSystemZ<4, outs, ins, asmstr, pattern> {
+  field bits<32> Inst;
+  field bits<32> SoftFail = 0;
+
+  bits<16> BD2;
+
+  let Inst{31-16} = op;
+  let Inst{15-0}  = BD2;
+}
+
 //===----------------------------------------------------------------------===//
 // Instruction definitions with semantics
 //===----------------------------------------------------------------------===//
Index: llvm-head/lib/Target/SystemZ/SystemZInstrInfo.td
===================================================================
--- llvm-head.orig/lib/Target/SystemZ/SystemZInstrInfo.td
+++ llvm-head/lib/Target/SystemZ/SystemZInstrInfo.td
@@ -1362,6 +1362,60 @@ let Defs = [CC] in {
 }
 
 //===----------------------------------------------------------------------===//
+// Transactional execution
+//===----------------------------------------------------------------------===//
+
+let Predicates = [FeatureTransactionalExecution] in {
+  // Transaction Begin
+  let hasSideEffects = 1, mayStore = 1,
+      usesCustomInserter = 1, Defs = [CC] in {
+    def TBEGIN : InstSIL<0xE560,
+                         (outs), (ins bdaddr12only:$BD1, imm32zx16:$I2),
+                         "tbegin\t$BD1, $I2",
+                         [(z_tbegin bdaddr12only:$BD1, imm32zx16:$I2)]>;
+    def TBEGIN_nofloat : Pseudo<(outs), (ins bdaddr12only:$BD1, imm32zx16:$I2),
+                                [(z_tbegin_nofloat bdaddr12only:$BD1,
+                                                   imm32zx16:$I2)]>;
+    def TBEGINC : InstSIL<0xE561,
+                          (outs), (ins bdaddr12only:$BD1, imm32zx16:$I2),
+                          "tbeginc\t$BD1, $I2",
+                          [(int_s390_tbeginc bdaddr12only:$BD1,
+                                             imm32zx16:$I2)]>;
+  }
+
+  // Transaction End
+  let hasSideEffects = 1, Defs = [CC], BD2 = 0 in
+    def TEND : InstS<0xB2F8, (outs), (ins), "tend", [(z_tend)]>;
+
+  // Transaction Abort
+  let hasSideEffects = 1, isTerminator = 1, isBarrier = 1 in
+    def TABORT : InstS<0xB2FC, (outs), (ins bdaddr12only:$BD2),
+                       "tabort\t$BD2",
+                       [(int_s390_tabort bdaddr12only:$BD2)]>;
+
+  // Nontransactional Store
+  let hasSideEffects = 1 in
+    def NTSTG : StoreRXY<"ntstg", 0xE325, int_s390_ntstg, GR64, 8>;
+
+  // Extract Transaction Nesting Depth
+  let hasSideEffects = 1 in
+    def ETND : InherentRRE<"etnd", 0xB2EC, GR32, (int_s390_etnd)>;
+}
+
+//===----------------------------------------------------------------------===//
+// Processor assist
+//===----------------------------------------------------------------------===//
+
+let Predicates = [FeatureProcessorAssist] in {
+  let hasSideEffects = 1, R4 = 0 in
+    def PPA : InstRRF<0xB2E8, (outs), (ins GR64:$R1, GR64:$R2, imm32zx4:$R3),
+                      "ppa\t$R1, $R2, $R3", []>;
+  def : Pat<(int_s390_ppa_txassist GR32:$src),
+            (PPA (INSERT_SUBREG (i64 (IMPLICIT_DEF)), GR32:$src, subreg_l32),
+                 0, 1)>;
+}
+
+//===----------------------------------------------------------------------===//
 // Miscellaneous Instructions.
 //===----------------------------------------------------------------------===//
 
Index: llvm-head/lib/Target/SystemZ/SystemZProcessors.td
===================================================================
--- llvm-head.orig/lib/Target/SystemZ/SystemZProcessors.td
+++ llvm-head/lib/Target/SystemZ/SystemZProcessors.td
@@ -60,6 +60,16 @@ def FeatureMiscellaneousExtensions : Sys
   "Assume that the miscellaneous-extensions facility is installed"
 >;
 
+def FeatureTransactionalExecution : SystemZFeature<
+  "transactional-execution", "TransactionalExecution",
+  "Assume that the transactional-execution facility is installed"
+>;
+
+def FeatureProcessorAssist : SystemZFeature<
+  "processor-assist", "ProcessorAssist",
+  "Assume that the processor-assist facility is installed"
+>;
+
 def : Processor<"generic", NoItineraries, []>;
 def : Processor<"z10", NoItineraries, []>;
 def : Processor<"z196", NoItineraries,
@@ -70,4 +80,5 @@ def : Processor<"zEC12", NoItineraries,
                 [FeatureDistinctOps, FeatureLoadStoreOnCond, FeatureHighWord,
                  FeatureFPExtension, FeaturePopulationCount,
                  FeatureFastSerialization, FeatureInterlockedAccess1,
-                 FeatureMiscellaneousExtensions]>;
+                 FeatureMiscellaneousExtensions,
+                 FeatureTransactionalExecution, FeatureProcessorAssist]>;
Index: llvm-head/lib/Target/SystemZ/SystemZSubtarget.cpp
===================================================================
--- llvm-head.orig/lib/Target/SystemZ/SystemZSubtarget.cpp
+++ llvm-head/lib/Target/SystemZ/SystemZSubtarget.cpp
@@ -40,6 +40,7 @@ SystemZSubtarget::SystemZSubtarget(const
       HasLoadStoreOnCond(false), HasHighWord(false), HasFPExtension(false),
       HasPopulationCount(false), HasFastSerialization(false),
       HasInterlockedAccess1(false), HasMiscellaneousExtensions(false),
+      HasTransactionalExecution(false), HasProcessorAssist(false),
       TargetTriple(TT), InstrInfo(initializeSubtargetDependencies(CPU, FS)),
       TLInfo(TM, *this), TSInfo(*TM.getDataLayout()), FrameLowering() {}
 
Index: llvm-head/lib/Target/SystemZ/SystemZSubtarget.h
===================================================================
--- llvm-head.orig/lib/Target/SystemZ/SystemZSubtarget.h
+++ llvm-head/lib/Target/SystemZ/SystemZSubtarget.h
@@ -42,6 +42,8 @@ protected:
   bool HasFastSerialization;
   bool HasInterlockedAccess1;
   bool HasMiscellaneousExtensions;
+  bool HasTransactionalExecution;
+  bool HasProcessorAssist;
 
 private:
   Triple TargetTriple;
@@ -102,6 +104,12 @@ public:
     return HasMiscellaneousExtensions;
   }
 
+  // Return true if the target has the transactional-execution facility.
+  bool hasTransactionalExecution() const { return HasTransactionalExecution; }
+
+  // Return true if the target has the processor-assist facility.
+  bool hasProcessorAssist() const { return HasProcessorAssist; }
+
   // Return true if GV can be accessed using LARL for reloc model RM
   // and code model CM.
   bool isPC32DBLSymbol(const GlobalValue *GV, Reloc::Model RM,
Index: llvm-head/lib/Support/Triple.cpp
===================================================================
--- llvm-head.orig/lib/Support/Triple.cpp
+++ llvm-head/lib/Support/Triple.cpp
@@ -92,7 +92,7 @@ const char *Triple::getArchTypePrefix(Ar
   case sparcv9:
   case sparc:       return "sparc";
 
-  case systemz:     return "systemz";
+  case systemz:     return "s390";
 
   case x86:
   case x86_64:      return "x86";
Index: llvm-head/include/llvm/IR/Intrinsics.td
===================================================================
--- llvm-head.orig/include/llvm/IR/Intrinsics.td
+++ llvm-head/include/llvm/IR/Intrinsics.td
@@ -634,3 +634,4 @@ include "llvm/IR/IntrinsicsNVVM.td"
 include "llvm/IR/IntrinsicsMips.td"
 include "llvm/IR/IntrinsicsR600.td"
 include "llvm/IR/IntrinsicsBPF.td"
+include "llvm/IR/IntrinsicsSystemZ.td"
Index: llvm-head/include/llvm/IR/IntrinsicsSystemZ.td
===================================================================
--- /dev/null
+++ llvm-head/include/llvm/IR/IntrinsicsSystemZ.td
@@ -0,0 +1,46 @@
+//===- IntrinsicsSystemZ.td - Defines SystemZ intrinsics ---*- tablegen -*-===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// This file defines all of the SystemZ-specific intrinsics.
+//
+//===----------------------------------------------------------------------===//
+
+//===----------------------------------------------------------------------===//
+//
+// Transactional-execution intrinsics
+//
+//===----------------------------------------------------------------------===//
+
+let TargetPrefix = "s390" in {
+  def int_s390_tbegin : Intrinsic<[llvm_i32_ty], [llvm_ptr_ty, llvm_i32_ty],
+                                  [IntrNoDuplicate]>;
+
+  def int_s390_tbegin_nofloat : Intrinsic<[llvm_i32_ty],
+                                          [llvm_ptr_ty, llvm_i32_ty],
+                                          [IntrNoDuplicate]>;
+
+  def int_s390_tbeginc : Intrinsic<[], [llvm_ptr_ty, llvm_i32_ty],
+                                   [IntrNoDuplicate]>;
+
+  def int_s390_tabort : Intrinsic<[], [llvm_i64_ty],
+                                  [IntrNoReturn, Throws]>;
+
+  def int_s390_tend : GCCBuiltin<"__builtin_tend">,
+                      Intrinsic<[llvm_i32_ty], []>;
+
+  def int_s390_etnd : GCCBuiltin<"__builtin_tx_nesting_depth">,
+                      Intrinsic<[llvm_i32_ty], [], [IntrNoMem]>;
+
+  def int_s390_ntstg : Intrinsic<[], [llvm_i64_ty, llvm_ptr64_ty],
+                                 [IntrReadWriteArgMem]>;
+
+  def int_s390_ppa_txassist : GCCBuiltin<"__builtin_tx_assist">,
+                              Intrinsic<[], [llvm_i32_ty]>;
+}
+
Index: llvm-head/lib/Target/SystemZ/SystemZ.h
===================================================================
--- llvm-head.orig/lib/Target/SystemZ/SystemZ.h
+++ llvm-head/lib/Target/SystemZ/SystemZ.h
@@ -68,6 +68,18 @@ const unsigned CCMASK_TM_MSB_0       = C
 const unsigned CCMASK_TM_MSB_1       = CCMASK_2 | CCMASK_3;
 const unsigned CCMASK_TM             = CCMASK_ANY;
 
+// Condition-code mask assignments for TRANSACTION_BEGIN.
+const unsigned CCMASK_TBEGIN_STARTED       = CCMASK_0;
+const unsigned CCMASK_TBEGIN_INDETERMINATE = CCMASK_1;
+const unsigned CCMASK_TBEGIN_TRANSIENT     = CCMASK_2;
+const unsigned CCMASK_TBEGIN_PERSISTENT    = CCMASK_3;
+const unsigned CCMASK_TBEGIN               = CCMASK_ANY;
+
+// Condition-code mask assignments for TRANSACTION_END.
+const unsigned CCMASK_TEND_TX   = CCMASK_0;
+const unsigned CCMASK_TEND_NOTX = CCMASK_2;
+const unsigned CCMASK_TEND      = CCMASK_TEND_TX | CCMASK_TEND_NOTX;
+
 // The position of the low CC bit in an IPM result.
 const unsigned IPM_CC = 28;
 
Index: llvm-head/lib/Target/SystemZ/SystemZISelLowering.h
===================================================================
--- llvm-head.orig/lib/Target/SystemZ/SystemZISelLowering.h
+++ llvm-head/lib/Target/SystemZ/SystemZISelLowering.h
@@ -146,6 +146,15 @@ enum {
   // Perform a serialization operation.  (BCR 15,0 or BCR 14,0.)
   SERIALIZE,
 
+  // Transaction begin.  The first operand is the chain, the second
+  // the TDB pointer, and the third the immediate control field.
+  // Returns chain and glue.
+  TBEGIN,
+  TBEGIN_NOFLOAT,
+
+  // Transaction end.  Just the chain operand.  Returns chain and glue.
+  TEND,
+
   // Wrappers around the inner loop of an 8- or 16-bit ATOMIC_SWAP or
   // ATOMIC_LOAD_<op>.
   //
@@ -318,6 +327,7 @@ private:
   SDValue lowerSTACKSAVE(SDValue Op, SelectionDAG &DAG) const;
   SDValue lowerSTACKRESTORE(SDValue Op, SelectionDAG &DAG) const;
   SDValue lowerPREFETCH(SDValue Op, SelectionDAG &DAG) const;
+  SDValue lowerINTRINSIC_W_CHAIN(SDValue Op, SelectionDAG &DAG) const;
 
   // If the last instruction before MBBI in MBB was some form of COMPARE,
   // try to replace it with a COMPARE AND BRANCH just before MBBI.
@@ -355,6 +365,10 @@ private:
   MachineBasicBlock *emitStringWrapper(MachineInstr *MI,
                                        MachineBasicBlock *BB,
                                        unsigned Opcode) const;
+  MachineBasicBlock *emitTransactionBegin(MachineInstr *MI,
+                                          MachineBasicBlock *MBB,
+                                          unsigned Opcode,
+                                          bool NoFloat) const;
 };
 } // end namespace llvm
 
Index: llvm-head/lib/Target/SystemZ/SystemZISelLowering.cpp
===================================================================
--- llvm-head.orig/lib/Target/SystemZ/SystemZISelLowering.cpp
+++ llvm-head/lib/Target/SystemZ/SystemZISelLowering.cpp
@@ -20,6 +20,7 @@
 #include "llvm/CodeGen/MachineInstrBuilder.h"
 #include "llvm/CodeGen/MachineRegisterInfo.h"
 #include "llvm/CodeGen/TargetLoweringObjectFileImpl.h"
+#include "llvm/IR/Intrinsics.h"
 #include <cctype>
 
 using namespace llvm;
@@ -304,6 +305,9 @@ SystemZTargetLowering::SystemZTargetLowe
   // Codes for which we want to perform some z-specific combinations.
   setTargetDAGCombine(ISD::SIGN_EXTEND);
 
+  // Handle intrinsics.
+  setOperationAction(ISD::INTRINSIC_W_CHAIN, MVT::Other, Custom);
+
   // We want to use MVC in preference to even a single load/store pair.
   MaxStoresPerMemcpy = 0;
   MaxStoresPerMemcpyOptSize = 0;
@@ -1031,6 +1035,53 @@ prepareVolatileOrAtomicLoad(SDValue Chai
   return DAG.getNode(SystemZISD::SERIALIZE, DL, MVT::Other, Chain);
 }
 
+// Return true if Op is an intrinsic node with chain that returns the CC value
+// as its only (other) argument.  Provide the associated SystemZISD opcode and
+// the mask of valid CC values if so.
+static bool isIntrinsicWithCCAndChain(SDValue Op, unsigned &Opcode,
+                                      unsigned &CCValid) {
+  unsigned Id = cast<ConstantSDNode>(Op.getOperand(1))->getZExtValue();
+  switch (Id) {
+  case Intrinsic::s390_tbegin:
+    Opcode = SystemZISD::TBEGIN;
+    CCValid = SystemZ::CCMASK_TBEGIN;
+    return true;
+
+  case Intrinsic::s390_tbegin_nofloat:
+    Opcode = SystemZISD::TBEGIN_NOFLOAT;
+    CCValid = SystemZ::CCMASK_TBEGIN;
+    return true;
+
+  case Intrinsic::s390_tend:
+    Opcode = SystemZISD::TEND;
+    CCValid = SystemZ::CCMASK_TEND;
+    return true;
+
+  default:
+    return false;
+  }
+}
+
+// Emit an intrinsic with chain with a glued value instead of its CC result.
+static SDValue emitIntrinsicWithChainAndGlue(SelectionDAG &DAG, SDValue Op,
+                                             unsigned Opcode) {
+  // Copy all operands except the intrinsic ID.
+  unsigned NumOps = Op.getNumOperands();
+  SmallVector<SDValue, 6> Ops;
+  Ops.reserve(NumOps - 1);
+  Ops.push_back(Op.getOperand(0));
+  for (unsigned I = 2; I < NumOps; ++I)
+    Ops.push_back(Op.getOperand(I));
+
+  assert(Op->getNumValues() == 2 && "Expected only CC result and chain");
+  SDVTList RawVTs = DAG.getVTList(MVT::Other, MVT::Glue);
+  SDValue Intr = DAG.getNode(Opcode, SDLoc(Op), RawVTs, Ops);
+  SDValue OldChain = SDValue(Op.getNode(), 1);
+  SDValue NewChain = SDValue(Intr.getNode(), 0);
+  DAG.ReplaceAllUsesOfValueWith(OldChain, NewChain);
+  return Intr;
+}
+
 // CC is a comparison that will be implemented using an integer or
 // floating-point comparison.  Return the condition code mask for
 // a branch on true.  In the integer case, CCMASK_CMP_UO is set for
@@ -1588,9 +1639,53 @@ static void adjustForTestUnderMask(Selec
   C.CCMask = NewCCMask;
 }
 
+// Return a Comparison that tests the condition-code result of intrinsic
+// node Call against constant integer CC using comparison code Cond.
+// Opcode is the opcode of the SystemZISD operation for the intrinsic
+// and CCValid is the set of possible condition-code results.
+static Comparison getIntrinsicCmp(SelectionDAG &DAG, unsigned Opcode,
+                                  SDValue Call, unsigned CCValid, uint64_t CC,
+                                  ISD::CondCode Cond) {
+  Comparison C(Call, SDValue());
+  C.Opcode = Opcode;
+  C.CCValid = CCValid;
+  if (Cond == ISD::SETEQ)
+    // bit 3 for CC==0, bit 0 for CC==3, always false for CC>3.
+    C.CCMask = CC < 4 ? 1 << (3 - CC) : 0;
+  else if (Cond == ISD::SETNE)
+    // ...and the inverse of that.
+    C.CCMask = CC < 4 ? ~(1 << (3 - CC)) : -1;
+  else if (Cond == ISD::SETLT || Cond == ISD::SETULT)
+    // bits above bit 3 for CC==0 (always false), bits above bit 0 for CC==3,
+    // always true for CC>3.
+    C.CCMask = CC < 4 ? -1 << (4 - CC) : -1;
+  else if (Cond == ISD::SETGE || Cond == ISD::SETUGE)
+    // ...and the inverse of that.
+    C.CCMask = CC < 4 ? ~(-1 << (4 - CC)) : 0;
+  else if (Cond == ISD::SETLE || Cond == ISD::SETULE)
+    // bit 3 and above for CC==0, bit 0 and above for CC==3 (always true),
+    // always true for CC>3.
+    C.CCMask = CC < 4 ? -1 << (3 - CC) : -1;
+  else if (Cond == ISD::SETGT || Cond == ISD::SETUGT)
+    // ...and the inverse of that.
+    C.CCMask = CC < 4 ? ~(-1 << (3 - CC)) : 0;
+  else
+    llvm_unreachable("Unexpected integer comparison type");
+  C.CCMask &= CCValid;
+  return C;
+}
+
 // Decide how to implement a comparison of type Cond between CmpOp0 with CmpOp1.
 static Comparison getCmp(SelectionDAG &DAG, SDValue CmpOp0, SDValue CmpOp1,
                          ISD::CondCode Cond) {
+  if (CmpOp1.getOpcode() == ISD::Constant) {
+    uint64_t Constant = cast<ConstantSDNode>(CmpOp1)->getZExtValue();
+    unsigned Opcode, CCValid;
+    if (CmpOp0.getOpcode() == ISD::INTRINSIC_W_CHAIN &&
+        CmpOp0.getResNo() == 0 && CmpOp0->hasNUsesOfValue(1, 0) &&
+        isIntrinsicWithCCAndChain(CmpOp0, Opcode, CCValid))
+      return getIntrinsicCmp(DAG, Opcode, CmpOp0, CCValid, Constant, Cond);
+  }
   Comparison C(CmpOp0, CmpOp1);
   C.CCMask = CCMaskForCondCode(Cond);
   if (C.Op0.getValueType().isFloatingPoint()) {
@@ -1632,6 +1727,17 @@ static Comparison getCmp(SelectionDAG &D
 
 // Emit the comparison instruction described by C.
 static SDValue emitCmp(SelectionDAG &DAG, SDLoc DL, Comparison &C) {
+  if (!C.Op1.getNode()) {
+    SDValue Op;
+    switch (C.Op0.getOpcode()) {
+    case ISD::INTRINSIC_W_CHAIN:
+      Op = emitIntrinsicWithChainAndGlue(DAG, C.Op0, C.Opcode);
+      break;
+    default:
+      llvm_unreachable("Invalid comparison operands");
+    }
+    return SDValue(Op.getNode(), Op->getNumValues() - 1);
+  }
   if (C.Opcode == SystemZISD::ICMP)
     return DAG.getNode(SystemZISD::ICMP, DL, MVT::Glue, C.Op0, C.Op1,
                        DAG.getConstant(C.ICmpType, MVT::i32));
@@ -1713,7 +1819,6 @@ SDValue SystemZTargetLowering::lowerSETC
 }
 
 SDValue SystemZTargetLowering::lowerBR_CC(SDValue Op, SelectionDAG &DAG) const {
-  SDValue Chain    = Op.getOperand(0);
   ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(1))->get();
   SDValue CmpOp0   = Op.getOperand(2);
   SDValue CmpOp1   = Op.getOperand(3);
@@ -1723,7 +1828,7 @@ SDValue SystemZTargetLowering::lowerBR_C
   Comparison C(getCmp(DAG, CmpOp0, CmpOp1, CC));
   SDValue Glue = emitCmp(DAG, DL, C);
   return DAG.getNode(SystemZISD::BR_CCMASK, DL, Op.getValueType(),
-                     Chain, DAG.getConstant(C.CCValid, MVT::i32),
+                     Op.getOperand(0), DAG.getConstant(C.CCValid, MVT::i32),
                      DAG.getConstant(C.CCMask, MVT::i32), Dest, Glue);
 }
 
@@ -2561,6 +2666,30 @@ SDValue SystemZTargetLowering::lowerPREF
                                  Node->getMemoryVT(), Node->getMemOperand());
 }
 
+// Return an i32 that contains the value of CC immediately after After,
+// whose final operand must be MVT::Glue.
+static SDValue getCCResult(SelectionDAG &DAG, SDNode *After) {
+  SDValue Glue = SDValue(After, After->getNumValues() - 1);
+  SDValue IPM = DAG.getNode(SystemZISD::IPM, SDLoc(After), MVT::i32, Glue);
+  return DAG.getNode(ISD::SRL, SDLoc(After), MVT::i32, IPM,
+                     DAG.getConstant(SystemZ::IPM_CC, MVT::i32));
+}
+
+SDValue
+SystemZTargetLowering::lowerINTRINSIC_W_CHAIN(SDValue Op,
+                                              SelectionDAG &DAG) const {
+  unsigned Opcode, CCValid;
+  if (isIntrinsicWithCCAndChain(Op, Opcode, CCValid)) {
+    assert(Op->getNumValues() == 2 && "Expected only CC result and chain");
+    SDValue Glued = emitIntrinsicWithChainAndGlue(DAG, Op, Opcode);
+    SDValue CC = getCCResult(DAG, Glued.getNode());
+    DAG.ReplaceAllUsesOfValueWith(SDValue(Op.getNode(), 0), CC);
+    return SDValue();
+  }
+
+  return SDValue();
+}
+
 SDValue SystemZTargetLowering::LowerOperation(SDValue Op,
                                               SelectionDAG &DAG) const {
   switch (Op.getOpcode()) {
@@ -2634,6 +2763,8 @@ SDValue SystemZTargetLowering::LowerOper
     return lowerSTACKRESTORE(Op, DAG);
   case ISD::PREFETCH:
     return lowerPREFETCH(Op, DAG);
+  case ISD::INTRINSIC_W_CHAIN:
+    return lowerINTRINSIC_W_CHAIN(Op, DAG);
   default:
     llvm_unreachable("Unexpected node to lower");
   }
@@ -2674,6 +2805,9 @@ const char *SystemZTargetLowering::getTa
     OPCODE(SEARCH_STRING);
     OPCODE(IPM);
     OPCODE(SERIALIZE);
+    OPCODE(TBEGIN);
+    OPCODE(TBEGIN_NOFLOAT);
+    OPCODE(TEND);
     OPCODE(ATOMIC_SWAPW);
     OPCODE(ATOMIC_LOADW_ADD);
     OPCODE(ATOMIC_LOADW_SUB);
@@ -3501,6 +3635,50 @@ SystemZTargetLowering::emitStringWrapper
   return DoneMBB;
 }
 
+// Update TBEGIN instruction with final opcode and register clobbers.
+MachineBasicBlock *
+SystemZTargetLowering::emitTransactionBegin(MachineInstr *MI,
+                                            MachineBasicBlock *MBB,
+                                            unsigned Opcode,
+                                            bool NoFloat) const {
+  MachineFunction &MF = *MBB->getParent();
+  const TargetFrameLowering *TFI = Subtarget.getFrameLowering();
+  const SystemZInstrInfo *TII = Subtarget.getInstrInfo();
+
+  // Update opcode.
+  MI->setDesc(TII->get(Opcode));
+
+  // We cannot handle a TBEGIN that clobbers the stack or frame pointer.
+  // Make sure to add the corresponding GRSM bits if they are missing.
+  uint64_t Control = MI->getOperand(2).getImm();
+  static const unsigned GPRControlBit[16] = {
+    0x8000, 0x8000, 0x4000, 0x4000, 0x2000, 0x2000, 0x1000, 0x1000,
+    0x0800, 0x0800, 0x0400, 0x0400, 0x0200, 0x0200, 0x0100, 0x0100
+  };
+  Control |= GPRControlBit[15];
+  if (TFI->hasFP(MF))
+    Control |= GPRControlBit[11];
+  MI->getOperand(2).setImm(Control);
+
+  // Add GPR clobbers.
+  for (int I = 0; I < 16; I++) {
+    if ((Control & GPRControlBit[I]) == 0) {
+      unsigned Reg = SystemZMC::GR64Regs[I];
+      MI->addOperand(MachineOperand::CreateReg(Reg, true, true));
+    }
+  }
+
+  // Add FPR clobbers.
+  if (!NoFloat && (Control & 4) != 0) {
+    for (int I = 0; I < 16; I++) {
+      unsigned Reg = SystemZMC::FP64Regs[I];
+      MI->addOperand(MachineOperand::CreateReg(Reg, true, true));
+    }
+  }
+
+  return MBB;
+}
+
 MachineBasicBlock *SystemZTargetLowering::
 EmitInstrWithCustomInserter(MachineInstr *MI, MachineBasicBlock *MBB) const {
   switch (MI->getOpcode()) {
@@ -3742,6 +3920,12 @@ EmitInstrWithCustomInserter(MachineInstr
     return emitStringWrapper(MI, MBB, SystemZ::MVST);
   case SystemZ::SRSTLoop:
     return emitStringWrapper(MI, MBB, SystemZ::SRST);
+  case SystemZ::TBEGIN:
+    return emitTransactionBegin(MI, MBB, SystemZ::TBEGIN, false);
+  case SystemZ::TBEGIN_nofloat:
+    return emitTransactionBegin(MI, MBB, SystemZ::TBEGIN, true);
+  case SystemZ::TBEGINC:
+    return emitTransactionBegin(MI, MBB, SystemZ::TBEGINC, true);
   default:
     llvm_unreachable("Unexpected instr type to insert");
   }
Index: llvm-head/test/CodeGen/SystemZ/htm-intrinsics.ll
===================================================================
--- /dev/null
+++ llvm-head/test/CodeGen/SystemZ/htm-intrinsics.ll
@@ -0,0 +1,352 @@
+; Test transactional-execution intrinsics.
+;
+; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=zEC12 | FileCheck %s
+
+declare i32 @llvm.s390.tbegin(i8 *, i32)
+declare i32 @llvm.s390.tbegin.nofloat(i8 *, i32)
+declare void @llvm.s390.tbeginc(i8 *, i32)
+declare i32 @llvm.s390.tend()
+declare void @llvm.s390.tabort(i64)
+declare void @llvm.s390.ntstg(i64, i64 *)
+declare i32 @llvm.s390.etnd()
+declare void @llvm.s390.ppa.txassist(i32)
+
+; TBEGIN.
+define void @test_tbegin() {
+; CHECK-LABEL: test_tbegin:
+; CHECK-NOT: stmg
+; CHECK: std %f8,
+; CHECK: std %f9,
+; CHECK: std %f10,
+; CHECK: std %f11,
+; CHECK: std %f12,
+; CHECK: std %f13,
+; CHECK: std %f14,
+; CHECK: std %f15,
+; CHECK: tbegin 0, 65292
+; CHECK: ld %f8,
+; CHECK: ld %f9,
+; CHECK: ld %f10,
+; CHECK: ld %f11,
+; CHECK: ld %f12,
+; CHECK: ld %f13,
+; CHECK: ld %f14,
+; CHECK: ld %f15,
+; CHECK: br %r14
+  call i32 @llvm.s390.tbegin(i8 *null, i32 65292)
+  ret void
+}
+
+; TBEGIN (nofloat).
+define void @test_tbegin_nofloat1() {
+; CHECK-LABEL: test_tbegin_nofloat1:
+; CHECK-NOT: stmg
+; CHECK-NOT: std
+; CHECK: tbegin 0, 65292
+; CHECK: br %r14
+  call i32 @llvm.s390.tbegin.nofloat(i8 *null, i32 65292)
+  ret void
+}
+
+; TBEGIN (nofloat) with integer CC return value.
+define i32 @test_tbegin_nofloat2() {
+; CHECK-LABEL: test_tbegin_nofloat2:
+; CHECK-NOT: stmg
+; CHECK-NOT: std
+; CHECK: tbegin 0, 65292
+; CHECK: ipm %r2
+; CHECK: srl %r2, 28
+; CHECK: br %r14
+  %res = call i32 @llvm.s390.tbegin.nofloat(i8 *null, i32 65292)
+  ret i32 %res
+}
+
+; TBEGIN (nofloat) with implicit CC check.
+define void @test_tbegin_nofloat3(i32 *%ptr) {
+; CHECK-LABEL: test_tbegin_nofloat3:
+; CHECK-NOT: stmg
+; CHECK-NOT: std
+; CHECK: tbegin 0, 65292
+; CHECK: jnh  {{\.L*}}
+; CHECK: mvhi 0(%r2), 0
+; CHECK: br %r14
+  %res = call i32 @llvm.s390.tbegin.nofloat(i8 *null, i32 65292)
+  %cmp = icmp eq i32 %res, 2
+  br i1 %cmp, label %if.then, label %if.end
+
+if.then:                                          ; preds = %entry
+  store i32 0, i32* %ptr, align 4
+  br label %if.end
+
+if.end:                                           ; preds = %if.then, %entry
+  ret void
+}
+
+; TBEGIN (nofloat) with dual CC use.
+define i32 @test_tbegin_nofloat4(i32 %pad, i32 *%ptr) {
+; CHECK-LABEL: test_tbegin_nofloat4:
+; CHECK-NOT: stmg
+; CHECK-NOT: std
+; CHECK: tbegin 0, 65292
+; CHECK: ipm %r2
+; CHECK: srl %r2, 28
+; CHECK: cijlh %r2, 2,  {{\.L*}}
+; CHECK: mvhi 0(%r3), 0
+; CHECK: br %r14
+  %res = call i32 @llvm.s390.tbegin.nofloat(i8 *null, i32 65292)
+  %cmp = icmp eq i32 %res, 2
+  br i1 %cmp, label %if.then, label %if.end
+
+if.then:                                          ; preds = %entry
+  store i32 0, i32* %ptr, align 4
+  br label %if.end
+
+if.end:                                           ; preds = %if.then, %entry
+  ret i32 %res
+}
+
+; TBEGIN (nofloat) with register.
+define void @test_tbegin_nofloat5(i8 *%ptr) {
+; CHECK-LABEL: test_tbegin_nofloat5:
+; CHECK-NOT: stmg
+; CHECK-NOT: std
+; CHECK: tbegin 0(%r2), 65292
+; CHECK: br %r14
+  call i32 @llvm.s390.tbegin.nofloat(i8 *%ptr, i32 65292)
+  ret void
+}
+
+; TBEGIN (nofloat) with GRSM 0x0f00.
+define void @test_tbegin_nofloat6() {
+; CHECK-LABEL: test_tbegin_nofloat6:
+; CHECK: stmg %r6, %r15,
+; CHECK-NOT: std
+; CHECK: tbegin 0, 3840
+; CHECK: br %r14
+  call i32 @llvm.s390.tbegin.nofloat(i8 *null, i32 3840)
+  ret void
+}
+
+; TBEGIN (nofloat) with GRSM 0xf100.
+define void @test_tbegin_nofloat7() {
+; CHECK-LABEL: test_tbegin_nofloat7:
+; CHECK: stmg %r8, %r15,
+; CHECK-NOT: std
+; CHECK: tbegin 0, 61696
+; CHECK: br %r14
+  call i32 @llvm.s390.tbegin.nofloat(i8 *null, i32 61696)
+  ret void
+}
+
+; TBEGIN (nofloat) with GRSM 0xfe00 -- stack pointer added automatically.
+define void @test_tbegin_nofloat8() {
+; CHECK-LABEL: test_tbegin_nofloat8:
+; CHECK-NOT: stmg
+; CHECK-NOT: std
+; CHECK: tbegin 0, 65280
+; CHECK: br %r14
+  call i32 @llvm.s390.tbegin.nofloat(i8 *null, i32 65024)
+  ret void
+}
+
+; TBEGIN (nofloat) with GRSM 0xfb00 -- no frame pointer needed.
+define void @test_tbegin_nofloat9() {
+; CHECK-LABEL: test_tbegin_nofloat9:
+; CHECK: stmg %r10, %r15,
+; CHECK-NOT: std
+; CHECK: tbegin 0, 64256
+; CHECK: br %r14
+  call i32 @llvm.s390.tbegin.nofloat(i8 *null, i32 64256)
+  ret void
+}
+
+; TBEGIN (nofloat) with GRSM 0xfb00 -- frame pointer added automatically.
+define void @test_tbegin_nofloat10(i64 %n) {
+; CHECK-LABEL: test_tbegin_nofloat10:
+; CHECK: stmg %r11, %r15,
+; CHECK-NOT: std
+; CHECK: tbegin 0, 65280
+; CHECK: br %r14
+  %buf = alloca i8, i64 %n
+  call i32 @llvm.s390.tbegin.nofloat(i8 *null, i32 64256)
+  ret void
+}
+
+; TBEGINC.
+define void @test_tbeginc() {
+; CHECK-LABEL: test_tbeginc:
+; CHECK-NOT: stmg
+; CHECK-NOT: std
+; CHECK: tbeginc 0, 65288
+; CHECK: br %r14
+  call void @llvm.s390.tbeginc(i8 *null, i32 65288)
+  ret void
+}
+
+; TEND with integer CC return value.
+define i32 @test_tend1() {
+; CHECK-LABEL: test_tend1:
+; CHECK: tend
+; CHECK: ipm %r2
+; CHECK: srl %r2, 28
+; CHECK: br %r14
+  %res = call i32 @llvm.s390.tend()
+  ret i32 %res
+}
+
+; TEND with implicit CC check.
+define void @test_tend3(i32 *%ptr) {
+; CHECK-LABEL: test_tend3:
+; CHECK: tend
+; CHECK: je  {{\.L*}}
+; CHECK: mvhi 0(%r2), 0
+; CHECK: br %r14
+  %res = call i32 @llvm.s390.tend()
+  %cmp = icmp eq i32 %res, 2
+  br i1 %cmp, label %if.then, label %if.end
+
+if.then:                                          ; preds = %entry
+  store i32 0, i32* %ptr, align 4
+  br label %if.end
+
+if.end:                                           ; preds = %if.then, %entry
+  ret void
+}
+
+; TEND with dual CC use.
+define i32 @test_tend2(i32 %pad, i32 *%ptr) {
+; CHECK-LABEL: test_tend2:
+; CHECK: tend
+; CHECK: ipm %r2
+; CHECK: srl %r2, 28
+; CHECK: cijlh %r2, 2,  {{\.L*}}
+; CHECK: mvhi 0(%r3), 0
+; CHECK: br %r14
+  %res = call i32 @llvm.s390.tend()
+  %cmp = icmp eq i32 %res, 2
+  br i1 %cmp, label %if.then, label %if.end
+
+if.then:                                          ; preds = %entry
+  store i32 0, i32* %ptr, align 4
+  br label %if.end
+
+if.end:                                           ; preds = %if.then, %entry
+  ret i32 %res
+}
+
+; TABORT with register only.
+define void @test_tabort1(i64 %val) {
+; CHECK-LABEL: test_tabort1:
+; CHECK: tabort 0(%r2)
+; CHECK: br %r14
+  call void @llvm.s390.tabort(i64 %val)
+  ret void
+}
+
+; TABORT with immediate only.
+define void @test_tabort2(i64 %val) {
+; CHECK-LABEL: test_tabort2:
+; CHECK: tabort 1234
+; CHECK: br %r14
+  call void @llvm.s390.tabort(i64 1234)
+  ret void
+}
+
+; TABORT with register + immediate.
+define void @test_tabort3(i64 %val) {
+; CHECK-LABEL: test_tabort3:
+; CHECK: tabort 1234(%r2)
+; CHECK: br %r14
+  %sum = add i64 %val, 1234
+  call void @llvm.s390.tabort(i64 %sum)
+  ret void
+}
+
+; TABORT with out-of-range immediate.
+define void @test_tabort4(i64 %val) {
+; CHECK-LABEL: test_tabort4:
+; CHECK: tabort 0({{%r[1-5]}})
+; CHECK: br %r14
+  call void @llvm.s390.tabort(i64 4096)
+  ret void
+}
+
+; NTSTG with base pointer only.
+define void @test_ntstg1(i64 *%ptr, i64 %val) {
+; CHECK-LABEL: test_ntstg1:
+; CHECK: ntstg %r3, 0(%r2)
+; CHECK: br %r14
+  call void @llvm.s390.ntstg(i64 %val, i64 *%ptr)
+  ret void
+}
+
+; NTSTG with base and index.
+; Check that VSTL doesn't allow an index.
+define void @test_ntstg2(i64 *%base, i64 %index, i64 %val) {
+; CHECK-LABEL: test_ntstg2:
+; CHECK: sllg [[REG:%r[1-5]]], %r3, 3
+; CHECK: ntstg %r4, 0([[REG]],%r2)
+; CHECK: br %r14
+  %ptr = getelementptr i64, i64 *%base, i64 %index
+  call void @llvm.s390.ntstg(i64 %val, i64 *%ptr)
+  ret void
+}
+
+; NTSTG with the highest in-range displacement.
+define void @test_ntstg3(i64 *%base, i64 %val) {
+; CHECK-LABEL: test_ntstg3:
+; CHECK: ntstg %r3, 524280(%r2)
+; CHECK: br %r14
+  %ptr = getelementptr i64, i64 *%base, i64 65535
+  call void @llvm.s390.ntstg(i64 %val, i64 *%ptr)
+  ret void
+}
+
+; NTSTG with an out-of-range positive displacement.
+define void @test_ntstg4(i64 *%base, i64 %val) {
+; CHECK-LABEL: test_ntstg4:
+; CHECK: ntstg %r3, 0({{%r[1-5]}})
+; CHECK: br %r14
+  %ptr = getelementptr i64, i64 *%base, i64 65536
+  call void @llvm.s390.ntstg(i64 %val, i64 *%ptr)
+  ret void
+}
+
+; NTSTG with the lowest in-range displacement.
+define void @test_ntstg5(i64 *%base, i64 %val) {
+; CHECK-LABEL: test_ntstg5:
+; CHECK: ntstg %r3, -524288(%r2)
+; CHECK: br %r14
+  %ptr = getelementptr i64, i64 *%base, i64 -65536
+  call void @llvm.s390.ntstg(i64 %val, i64 *%ptr)
+  ret void
+}
+
+; NTSTG with an out-of-range negative displacement.
+define void @test_ntstg6(i64 *%base, i64 %val) {
+; CHECK-LABEL: test_ntstg6:
+; CHECK: ntstg %r3, 0({{%r[1-5]}})
+; CHECK: br %r14
+  %ptr = getelementptr i64, i64 *%base, i64 -65537
+  call void @llvm.s390.ntstg(i64 %val, i64 *%ptr)
+  ret void
+}
+
+; ETND.
+define i32 @test_etnd() {
+; CHECK-LABEL: test_etnd:
+; CHECK: etnd %r2
+; CHECK: br %r14
+  %res = call i32 @llvm.s390.etnd()
+  ret i32 %res
+}
+
+; PPA (Transaction-Abort Assist)
+define void @test_ppa_txassist(i32 %val) {
+; CHECK-LABEL: test_ppa_txassist:
+; CHECK: ppa %r2, 0, 1
+; CHECK: br %r14
+  call void @llvm.s390.ppa.txassist(i32 %val)
+  ret void
+}
+
Index: llvm-head/test/MC/SystemZ/insn-bad-zEC12.s
===================================================================
--- llvm-head.orig/test/MC/SystemZ/insn-bad-zEC12.s
+++ llvm-head/test/MC/SystemZ/insn-bad-zEC12.s
@@ -3,6 +3,22 @@
 # RUN: FileCheck < %t %s
 
 #CHECK: error: invalid operand
+#CHECK: ntstg	%r0, -524289
+#CHECK: error: invalid operand
+#CHECK: ntstg	%r0, 524288
+
+	ntstg	%r0, -524289
+	ntstg	%r0, 524288
+
+#CHECK: error: invalid operand
+#CHECK: ppa	%r0, %r0, -1
+#CHECK: error: invalid operand
+#CHECK: ppa	%r0, %r0, 16
+
+	ppa	%r0, %r0, -1
+	ppa	%r0, %r0, 16
+
+#CHECK: error: invalid operand
 #CHECK: risbgn	%r0,%r0,0,0,-1
 #CHECK: error: invalid operand
 #CHECK: risbgn	%r0,%r0,0,0,64
@@ -22,3 +38,47 @@
 	risbgn	%r0,%r0,-1,0,0
 	risbgn	%r0,%r0,256,0,0
 
+#CHECK: error: invalid operand
+#CHECK: tabort	-1
+#CHECK: error: invalid operand
+#CHECK: tabort	4096
+#CHECK: error: invalid use of indexed addressing
+#CHECK: tabort	0(%r1,%r2)
+
+	tabort	-1
+	tabort	4096
+	tabort	0(%r1,%r2)
+
+#CHECK: error: invalid operand
+#CHECK: tbegin	-1, 0
+#CHECK: error: invalid operand
+#CHECK: tbegin	4096, 0
+#CHECK: error: invalid use of indexed addressing
+#CHECK: tbegin	0(%r1,%r2), 0
+#CHECK: error: invalid operand
+#CHECK: tbegin	0, -1
+#CHECK: error: invalid operand
+#CHECK: tbegin	0, 65536
+
+	tbegin	-1, 0
+	tbegin	4096, 0
+	tbegin	0(%r1,%r2), 0
+	tbegin	0, -1
+	tbegin	0, 65536
+
+#CHECK: error: invalid operand
+#CHECK: tbeginc	-1, 0
+#CHECK: error: invalid operand
+#CHECK: tbeginc	4096, 0
+#CHECK: error: invalid use of indexed addressing
+#CHECK: tbeginc	0(%r1,%r2), 0
+#CHECK: error: invalid operand
+#CHECK: tbeginc	0, -1
+#CHECK: error: invalid operand
+#CHECK: tbeginc	0, 65536
+
+	tbeginc	-1, 0
+	tbeginc	4096, 0
+	tbeginc	0(%r1,%r2), 0
+	tbeginc	0, -1
+	tbeginc	0, 65536
Index: llvm-head/test/MC/SystemZ/insn-good-zEC12.s
===================================================================
--- llvm-head.orig/test/MC/SystemZ/insn-good-zEC12.s
+++ llvm-head/test/MC/SystemZ/insn-good-zEC12.s
@@ -1,6 +1,48 @@
 # For zEC12 and above.
 # RUN: llvm-mc -triple s390x-linux-gnu -mcpu=zEC12 -show-encoding %s | FileCheck %s
 
+#CHECK: etnd	%r0                     # encoding: [0xb2,0xec,0x00,0x00]
+#CHECK: etnd	%r15                    # encoding: [0xb2,0xec,0x00,0xf0]
+#CHECK: etnd	%r7                     # encoding: [0xb2,0xec,0x00,0x70]
+
+	etnd	%r0
+	etnd	%r15
+	etnd	%r7
+
+#CHECK: ntstg	%r0, -524288            # encoding: [0xe3,0x00,0x00,0x00,0x80,0x25]
+#CHECK: ntstg	%r0, -1                 # encoding: [0xe3,0x00,0x0f,0xff,0xff,0x25]
+#CHECK: ntstg	%r0, 0                  # encoding: [0xe3,0x00,0x00,0x00,0x00,0x25]
+#CHECK: ntstg	%r0, 1                  # encoding: [0xe3,0x00,0x00,0x01,0x00,0x25]
+#CHECK: ntstg	%r0, 524287             # encoding: [0xe3,0x00,0x0f,0xff,0x7f,0x25]
+#CHECK: ntstg	%r0, 0(%r1)             # encoding: [0xe3,0x00,0x10,0x00,0x00,0x25]
+#CHECK: ntstg	%r0, 0(%r15)            # encoding: [0xe3,0x00,0xf0,0x00,0x00,0x25]
+#CHECK: ntstg	%r0, 524287(%r1,%r15)   # encoding: [0xe3,0x01,0xff,0xff,0x7f,0x25]
+#CHECK: ntstg	%r0, 524287(%r15,%r1)   # encoding: [0xe3,0x0f,0x1f,0xff,0x7f,0x25]
+#CHECK: ntstg	%r15, 0                 # encoding: [0xe3,0xf0,0x00,0x00,0x00,0x25]
+
+	ntstg	%r0, -524288
+	ntstg	%r0, -1
+	ntstg	%r0, 0
+	ntstg	%r0, 1
+	ntstg	%r0, 524287
+	ntstg	%r0, 0(%r1)
+	ntstg	%r0, 0(%r15)
+	ntstg	%r0, 524287(%r1,%r15)
+	ntstg	%r0, 524287(%r15,%r1)
+	ntstg	%r15, 0
+
+#CHECK: ppa	%r0, %r0, 0             # encoding: [0xb2,0xe8,0x00,0x00]
+#CHECK: ppa	%r0, %r0, 15            # encoding: [0xb2,0xe8,0xf0,0x00]
+#CHECK: ppa	%r0, %r15, 0            # encoding: [0xb2,0xe8,0x00,0x0f]
+#CHECK: ppa	%r4, %r6, 7             # encoding: [0xb2,0xe8,0x70,0x46]
+#CHECK: ppa	%r15, %r0, 0            # encoding: [0xb2,0xe8,0x00,0xf0]
+
+	ppa	%r0, %r0, 0
+	ppa	%r0, %r0, 15
+	ppa	%r0, %r15, 0
+	ppa	%r4, %r6, 7
+	ppa	%r15, %r0, 0
+
 #CHECK: risbgn	%r0, %r0, 0, 0, 0       # encoding: [0xec,0x00,0x00,0x00,0x00,0x59]
 #CHECK: risbgn	%r0, %r0, 0, 0, 63      # encoding: [0xec,0x00,0x00,0x00,0x3f,0x59]
 #CHECK: risbgn	%r0, %r0, 0, 255, 0     # encoding: [0xec,0x00,0x00,0xff,0x00,0x59]
@@ -17,3 +59,68 @@
 	risbgn	%r15,%r0,0,0,0
 	risbgn	%r4,%r5,6,7,8
 
+#CHECK: tabort	0                       # encoding: [0xb2,0xfc,0x00,0x00]
+#CHECK: tabort	0(%r1)                  # encoding: [0xb2,0xfc,0x10,0x00]
+#CHECK: tabort	0(%r15)                 # encoding: [0xb2,0xfc,0xf0,0x00]
+#CHECK: tabort	4095                    # encoding: [0xb2,0xfc,0x0f,0xff]
+#CHECK: tabort	4095(%r1)               # encoding: [0xb2,0xfc,0x1f,0xff]
+#CHECK: tabort	4095(%r15)              # encoding: [0xb2,0xfc,0xff,0xff]
+
+	tabort	0
+	tabort	0(%r1)
+	tabort	0(%r15)
+	tabort	4095
+	tabort	4095(%r1)
+	tabort	4095(%r15)
+
+#CHECK: tbegin	0, 0                    # encoding: [0xe5,0x60,0x00,0x00,0x00,0x00]
+#CHECK: tbegin	4095, 0                 # encoding: [0xe5,0x60,0x0f,0xff,0x00,0x00]
+#CHECK: tbegin	0, 0                    # encoding: [0xe5,0x60,0x00,0x00,0x00,0x00]
+#CHECK: tbegin	0, 1                    # encoding: [0xe5,0x60,0x00,0x00,0x00,0x01]
+#CHECK: tbegin	0, 32767                # encoding: [0xe5,0x60,0x00,0x00,0x7f,0xff]
+#CHECK: tbegin	0, 32768                # encoding: [0xe5,0x60,0x00,0x00,0x80,0x00]
+#CHECK: tbegin	0, 65535                # encoding: [0xe5,0x60,0x00,0x00,0xff,0xff]
+#CHECK: tbegin	0(%r1), 42              # encoding: [0xe5,0x60,0x10,0x00,0x00,0x2a]
+#CHECK: tbegin	0(%r15), 42             # encoding: [0xe5,0x60,0xf0,0x00,0x00,0x2a]
+#CHECK: tbegin	4095(%r1), 42           # encoding: [0xe5,0x60,0x1f,0xff,0x00,0x2a]
+#CHECK: tbegin	4095(%r15), 42          # encoding: [0xe5,0x60,0xff,0xff,0x00,0x2a]
+
+	tbegin	0, 0
+	tbegin	4095, 0
+	tbegin	0, 0
+	tbegin	0, 1
+	tbegin	0, 32767
+	tbegin	0, 32768
+	tbegin	0, 65535
+	tbegin	0(%r1), 42
+	tbegin	0(%r15), 42
+	tbegin	4095(%r1), 42
+	tbegin	4095(%r15), 42
+
+#CHECK: tbeginc	0, 0                    # encoding: [0xe5,0x61,0x00,0x00,0x00,0x00]
+#CHECK: tbeginc	4095, 0                 # encoding: [0xe5,0x61,0x0f,0xff,0x00,0x00]
+#CHECK: tbeginc	0, 0                    # encoding: [0xe5,0x61,0x00,0x00,0x00,0x00]
+#CHECK: tbeginc	0, 1                    # encoding: [0xe5,0x61,0x00,0x00,0x00,0x01]
+#CHECK: tbeginc	0, 32767                # encoding: [0xe5,0x61,0x00,0x00,0x7f,0xff]
+#CHECK: tbeginc	0, 32768                # encoding: [0xe5,0x61,0x00,0x00,0x80,0x00]
+#CHECK: tbeginc	0, 65535                # encoding: [0xe5,0x61,0x00,0x00,0xff,0xff]
+#CHECK: tbeginc	0(%r1), 42              # encoding: [0xe5,0x61,0x10,0x00,0x00,0x2a]
+#CHECK: tbeginc	0(%r15), 42             # encoding: [0xe5,0x61,0xf0,0x00,0x00,0x2a]
+#CHECK: tbeginc	4095(%r1), 42           # encoding: [0xe5,0x61,0x1f,0xff,0x00,0x2a]
+#CHECK: tbeginc	4095(%r15), 42          # encoding: [0xe5,0x61,0xff,0xff,0x00,0x2a]
+
+	tbeginc	0, 0
+	tbeginc	4095, 0
+	tbeginc	0, 0
+	tbeginc	0, 1
+	tbeginc	0, 32767
+	tbeginc	0, 32768
+	tbeginc	0, 65535
+	tbeginc	0(%r1), 42
+	tbeginc	0(%r15), 42
+	tbeginc	4095(%r1), 42
+	tbeginc	4095(%r15), 42
+
+#CHECK: tend                            # encoding: [0xb2,0xf8,0x00,0x00]
+
+	tend
Index: llvm-head/test/MC/SystemZ/insn-bad-z196.s
===================================================================
--- llvm-head.orig/test/MC/SystemZ/insn-bad-z196.s
+++ llvm-head/test/MC/SystemZ/insn-bad-z196.s
@@ -244,6 +244,11 @@
 	cxlgbr	%f0, 16, %r0, 0
 	cxlgbr	%f2, 0, %r0, 0
 
+#CHECK: error: {{(instruction requires: transactional-execution)?}}
+#CHECK: etnd	%r7
+
+	etnd	%r7
+
 #CHECK: error: invalid operand
 #CHECK: fidbra	%f0, 0, %f0, -1
 #CHECK: error: invalid operand
@@ -546,6 +551,16 @@
 	locr	%r0,%r0,-1
 	locr	%r0,%r0,16
 
+#CHECK: error: {{(instruction requires: transactional-execution)?}}
+#CHECK: ntstg	%r0, 524287(%r1,%r15)
+
+	ntstg	%r0, 524287(%r1,%r15)
+
+#CHECK: error: {{(instruction requires: processor-assist)?}}
+#CHECK: ppa	%r4, %r6, 7
+
+	ppa	%r4, %r6, 7
+
 #CHECK: error: {{(instruction requires: miscellaneous-extensions)?}}
 #CHECK: risbgn	%r1, %r2, 0, 0, 0
 
@@ -690,3 +705,24 @@
 	stocg	%r0,-524289,1
 	stocg	%r0,524288,1
 	stocg	%r0,0(%r1,%r2),1
+
+#CHECK: error: {{(instruction requires: transactional-execution)?}}
+#CHECK: tabort	4095(%r1)
+
+	tabort	4095(%r1)
+
+#CHECK: error: {{(instruction requires: transactional-execution)?}}
+#CHECK: tbegin	4095(%r1), 42
+
+	tbegin	4095(%r1), 42
+
+#CHECK: error: {{(instruction requires: transactional-execution)?}}
+#CHECK: tbeginc	4095(%r1), 42
+
+	tbeginc	4095(%r1), 42
+
+#CHECK: error: {{(instruction requires: transactional-execution)?}}
+#CHECK: tend
+
+	tend
+
Index: llvm-head/test/MC/Disassembler/SystemZ/insns.txt
===================================================================
--- llvm-head.orig/test/MC/Disassembler/SystemZ/insns.txt
+++ llvm-head/test/MC/Disassembler/SystemZ/insns.txt
@@ -2503,6 +2503,15 @@
 # CHECK: ear %r15, %a15
 0xb2 0x4f 0x00 0xff
 
+# CHECK: etnd %r0
+0xb2 0xec 0x00 0x00
+
+# CHECK: etnd %r15
+0xb2 0xec 0x00 0xf0
+
+# CHECK: etnd %r7
+0xb2 0xec 0x00 0x70
+
 # CHECK: fidbr %f0, 0, %f0
 0xb3 0x5f 0x00 0x00
 
@@ -6034,6 +6043,36 @@
 # CHECK: ny %r15, 0
 0xe3 0xf0 0x00 0x00 0x00 0x54
 
+# CHECK: ntstg %r0, -524288
+0xe3 0x00 0x00 0x00 0x80 0x25
+
+# CHECK: ntstg %r0, -1
+0xe3 0x00 0x0f 0xff 0xff 0x25
+
+# CHECK: ntstg %r0, 0
+0xe3 0x00 0x00 0x00 0x00 0x25
+
+# CHECK: ntstg %r0, 1
+0xe3 0x00 0x00 0x01 0x00 0x25
+
+# CHECK: ntstg %r0, 524287
+0xe3 0x00 0x0f 0xff 0x7f 0x25
+
+# CHECK: ntstg %r0, 0(%r1)
+0xe3 0x00 0x10 0x00 0x00 0x25
+
+# CHECK: ntstg %r0, 0(%r15)
+0xe3 0x00 0xf0 0x00 0x00 0x25
+
+# CHECK: ntstg %r0, 524287(%r1,%r15)
+0xe3 0x01 0xff 0xff 0x7f 0x25
+
+# CHECK: ntstg %r0, 524287(%r15,%r1)
+0xe3 0x0f 0x1f 0xff 0x7f 0x25
+
+# CHECK: ntstg %r15, 0
+0xe3 0xf0 0x00 0x00 0x00 0x25
+
 # CHECK: oc 0(1), 0
 0xd6 0x00 0x00 0x00 0x00 0x00
 
@@ -6346,6 +6385,21 @@
 # CHECK: popcnt %r7, %r8
 0xb9 0xe1 0x00 0x78
 
+# CHECK: ppa %r0, %r0, 0
+0xb2 0xe8 0x00 0x00
+
+# CHECK: ppa %r0, %r0, 15
+0xb2 0xe8 0xf0 0x00
+
+# CHECK: ppa %r0, %r15, 0
+0xb2 0xe8 0x00 0x0f
+
+# CHECK: ppa %r4, %r6, 7
+0xb2 0xe8 0x70 0x46
+
+# CHECK: ppa %r15, %r0, 0
+0xb2 0xe8 0x00 0xf0
+
 # CHECK: risbg %r0, %r0, 0, 0, 0
 0xec 0x00 0x00 0x00 0x00 0x55
 
@@ -8062,6 +8116,93 @@
 # CHECK: sy %r15, 0
 0xe3 0xf0 0x00 0x00 0x00 0x5b
 
+# CHECK: tabort 0
+0xb2 0xfc 0x00 0x00
+
+# CHECK: tabort 0(%r1)
+0xb2 0xfc 0x10 0x00
+
+# CHECK: tabort 0(%r15)
+0xb2 0xfc 0xf0 0x00
+
+# CHECK: tabort 4095
+0xb2 0xfc 0x0f 0xff
+
+# CHECK: tabort 4095(%r1)
+0xb2 0xfc 0x1f 0xff
+
+# CHECK: tabort 4095(%r15)
+0xb2 0xfc 0xff 0xff
+
+# CHECK: tbegin 0, 0
+0xe5 0x60 0x00 0x00 0x00 0x00
+
+# CHECK: tbegin 4095, 0
+0xe5 0x60 0x0f 0xff 0x00 0x00
+
+# CHECK: tbegin 0, 0
+0xe5 0x60 0x00 0x00 0x00 0x00
+
+# CHECK: tbegin 0, 1
+0xe5 0x60 0x00 0x00 0x00 0x01
+
+# CHECK: tbegin 0, 32767
+0xe5 0x60 0x00 0x00 0x7f 0xff
+
+# CHECK: tbegin 0, 32768
+0xe5 0x60 0x00 0x00 0x80 0x00
+
+# CHECK: tbegin 0, 65535
+0xe5 0x60 0x00 0x00 0xff 0xff
+
+# CHECK: tbegin 0(%r1), 42
+0xe5 0x60 0x10 0x00 0x00 0x2a
+
+# CHECK: tbegin 0(%r15), 42
+0xe5 0x60 0xf0 0x00 0x00 0x2a
+
+# CHECK: tbegin 4095(%r1), 42
+0xe5 0x60 0x1f 0xff 0x00 0x2a
+
+# CHECK: tbegin 4095(%r15), 42
+0xe5 0x60 0xff 0xff 0x00 0x2a
+
+# CHECK: tbeginc 0, 0
+0xe5 0x61 0x00 0x00 0x00 0x00
+
+# CHECK: tbeginc 4095, 0
+0xe5 0x61 0x0f 0xff 0x00 0x00
+
+# CHECK: tbeginc 0, 0
+0xe5 0x61 0x00 0x00 0x00 0x00
+
+# CHECK: tbeginc 0, 1
+0xe5 0x61 0x00 0x00 0x00 0x01
+
+# CHECK: tbeginc 0, 32767
+0xe5 0x61 0x00 0x00 0x7f 0xff
+
+# CHECK: tbeginc 0, 32768
+0xe5 0x61 0x00 0x00 0x80 0x00
+
+# CHECK: tbeginc 0, 65535
+0xe5 0x61 0x00 0x00 0xff 0xff
+
+# CHECK: tbeginc 0(%r1), 42
+0xe5 0x61 0x10 0x00 0x00 0x2a
+
+# CHECK: tbeginc 0(%r15), 42
+0xe5 0x61 0xf0 0x00 0x00 0x2a
+
+# CHECK: tbeginc 4095(%r1), 42
+0xe5 0x61 0x1f 0xff 0x00 0x2a
+
+# CHECK: tbeginc 4095(%r15), 42
+0xe5 0x61 0xff 0xff 0x00 0x2a
+
+# CHECK: tend
+0xb2 0xf8 0x00 0x00
+
 # CHECK: tm 0, 0
 0x91 0x00 0x00 0x00
 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233803 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-01 12:51:43 +00:00
David Majnemer
64386621ec [WinEH] Generate .xdata for catch handlers
This lets us catch exceptions in simple cases.

N.B. Things that do not work include (but are not limited to):
- Throwing from within a catch handler.
- Catching an object with a named catch parameter.
- 'CatchHigh' is fictitious, we aren't sure of its purpose.
- We aren't entirely efficient with regards to the number of EH states
  that we generate.
- IP-to-State tables are sensitive to the order of emission.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233767 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-31 22:35:44 +00:00
Duncan P. N. Exon Smith
f067a68207 IR: Enable uniquing callbacks during MDNode::replaceWithUniqued()
Uniqued nodes have more complete registration with
`ReplaceableMetadataImpl` so that they can update themselves when
operands change.  Fix a bug where `MDNode::replaceWithUniqued()` wasn't
enabling these callbacks.

The two most obvious ways missing callbacks causes problems is that
auto-resolution fails and re-uniquing (on changed operands) just doesn't
happen.  I've added tests for both -- in both cases, I confirmed that
the final check was failing before the fix.

rdar://problem/20365935

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233751 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-31 20:50:50 +00:00
Lang Hames
83b5f345b2 [ExecutionEngine] Fix MCJIT::addGlobalMapping.
This patch fixes MCJIT::addGlobalMapping by changing the implementation of the
ExecutionEngineState class. The new implementation maintains a bidirectional
mapping between symbol names (std::strings) and addresses (uint64_ts), rather
than a mapping between Value*s and void*s.

This has fix has been made for backwards compatibility, however the strongly
preferred way to resolve unknown symbols is by writing a custom
RuntimeDyld::SymbolResolver (formerly RTDyldMemoryManager) and overriding the
findSymbol method. The addGlobalMapping method is a hangover from the legacy JIT
(which has was removed in 3.6), and may be deprecated in a future release as
part of a clean-up of the ExecutionEngine interface.

Patch by Murat Bolat. Thanks Murat!



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233747 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-31 20:31:14 +00:00
Matthias Braun
9df365e44e Clarify that higher priority means higher values.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233744 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-31 20:04:46 +00:00
Matthias Braun
8e4eaabdb8 RegAllocGreedy: Allow target to specify register class ordering.
Specify an allocation order with a register class. This is used by register
allocators with a greedy heuristic. This is usefull as it is sometimes
beneficial to color more constrained classes first.

Differential Revision: http://reviews.llvm.org/D8626

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233743 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-31 19:57:53 +00:00
Craig Topper
9a7c0031de Make llc use getHostCPUFeatures when 'native' is specified for cpu.
This is necessary for x86 where not all Sandybridge, Ivybrige, Haswell, and Broadwell CPUs support AVX. Currently we modify the CPU name back to Nehalem for this case, but that turns off additional features for these CPUs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233673 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-31 05:52:57 +00:00
Duncan P. N. Exon Smith
12b14d9a76 DebugInfo: Factor out RETURN_FROM_RAW, etc.
Remove the helper macros `RETURN_FROM_RAW()`,
`RETURN_DESCRIPTOR_FROM_RAW()`, and `RETURN_REF_FROM_RAW()`, since they
don't do anything too special anymore.  This loses an `assert(get())`,
but I'm hoping any crashes were shaken out when r232844 landed a few
weeks ago.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233660 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-31 01:47:37 +00:00
Duncan P. N. Exon Smith
0cbd7fc433 DebugInfo: Move debug info flags to the new hierarchy
Move definition of the debug info flags to the new hierarchy, but leave
them duplicated in `DIDescriptor` for now to reduce code churn.  My
current plan is to remove `DIDescriptor` entirely, so the duplication
should go away naturally.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233656 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-31 01:19:51 +00:00
Duncan P. N. Exon Smith
16710b289b DebugInfo: Remove LexicalBlockFile scope/context distinction
Two things here:

 1. I read `getScope()` and `getContext()` backwards in r233640.  There
    was no need for `getScopeOfScope()`.  Obviously not enough test
    coverage here (as I said in that commit, I'm going to come back to
    that), but anyway I'm reverting to the behaviour before r233640.
 2. The callers that use `DILexicalBlockFile::getContext()` don't seem
    to care about the difference.  Just have it redirect to `getScope()`
    so I can't get confused again.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233650 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-31 00:10:37 +00:00
Eric Christopher
e2424b02b2 Replace the MCSubtargetInfo parameter with a Triple when creating
an MCInstPrinter. Update all callers and use where we wanted a Triple
previously.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233648 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-31 00:10:04 +00:00
Duncan P. N. Exon Smith
497110d1b0 DebugLoc: Remove getFromDILexicalBlock()
The only user of `DebugLoc::getFromDILexicalBlock()` was creating a new
`MDLocation` as convenient API for passing an `MDScope`.  Stop doing
that, and remove the API.  If in the future we actually *want* to create
new DebugLocs, calling `MDLexicalBlock::get()` makes more sense.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233643 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-30 23:47:26 +00:00
Duncan P. N. Exon Smith
62e3e389b9 LexicalScopes: Use debug info hierarchy pervasively
Pervasively use the types provided by the debug info hierarchy rather
than `MDNode` in `LexicalScopes`.

I noticed (again, I guess, based on comments in the implementation?)
that `DILexicalBlockFile::getScope()` returns something different from
`DILexicalBlockFile::getContext()`.  I created a local helper for
getting the same logic from `MDLexicalBlockFile` called
`getScopeOfScope()`.  I still don't really understand it, but I've added
some FIXMEs and I'll come back to it (I suspect the way we encode these
objects isn't really ideal).

Note that my previous commit r233610 accidentally changed behaviour in
`findLexicalScope()` -- it transitioned from a call to
`DILexicalBlockFile::getScope()` to `MDLexicalBlockFile::getScope()`
(sounds right, doesn't it?) -- so I've fixed that as a drive-by.  No
tests failed with my error, so it looks like we're missing some coverage
here... when I come back to understand the logic, I'll see if I can add
some.

Other than the fix to `findLexicalScope()`, no functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233640 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-30 23:21:21 +00:00
David Majnemer
0a8ff297ad [WinEH] Run cleanup handlers when an exception is thrown
Generate tables in the .xdata section representing what actions to take
when an exception is thrown.  This currently fills in state for
cleanups, catch handlers are still unfinished.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233636 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-30 22:58:10 +00:00
Duncan P. N. Exon Smith
35ff67e333 LexicalScopes: Use MDLocation directly instead of DebugLoc
There's no benefit to using `DebugLoc` here.  Moreover, this will let a
follow-up commit work with `MDScope` directly instead of `DebugLoc`.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233610 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-30 21:54:46 +00:00
Eric Christopher
1c60a4e36b Remove unused Target argument from MCInstPrinter ctor functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233607 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-30 21:52:21 +00:00
David Blaikie
25e3d2d6d3 [opaque pointer type] Change GetElementPtrInst::getIndexedType to take the pointee type
This pushes the use of PointerType::getElementType up into several
callers - I'll essentially just have to keep pushing that up the stack
until I can eliminate every call to it...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233604 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-30 21:41:43 +00:00
Rafael Espindola
a55ae077e4 Fix PR23045.
Keep a note in the materializer that we are stripping debug info so that
user doing a lazy read of the module don't hit outdated formats.

Thanks to Duncan for suggesting the fix.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233603 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-30 21:36:43 +00:00
Duncan P. N. Exon Smith
494ae8db19 DwarfDebug: Avoid creating new DebugLocs in the backend
Don't use `DebugLoc::getFnDebugLoc()`, which creates new `MDLocation`s,
in the backend.  We just want to grab the subprogram here anyway.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233601 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-30 21:32:28 +00:00
Duncan P. N. Exon Smith
6d42c0084e DebugInfo: Remove dead code from old DebugLoc API
Remove old API for `DebugLoc` now that all the callers have been
updated.  If this broke your out-of-tree build, here's a quick map from
the old API to the new one:

    DebugLoc DebugLoc::getFromMDLocation(MDNode *)
      => DebugLoc::DebugLoc(MDLocation *)
      => explicit DebugLoc::DebugLoc(MDNode *) // works with broken code

    MDNode *DebugLoc::getAsMDNode(LLVMContext &)
      => MDLocation *DebugLoc::get()
      => DebugLoc::operator MDLocation *()
      => MDNode *DebugLoc::getAsMDNode() // works with broken code

    bool DebugLoc::isUnknown()
      => DebugLoc::operator MDLocation *()
          i.e.: if (MDLocation *DL = ...)
      => DebugLoc::operator bool() // works with broken code
          i.e.: if (DebugLoc DL = ...)

    void DebugLoc::getScopeAndInlinedAt(MDNode *&, MDNode *&)
      => use: MDNode *DebugLoc::getScope()
         and: MDLocation *DebugLoc::getInlinedAt()

    MDNode *DebugLoc::getScopeNode(LLVMContext &)
      => MDNode *DebugLoc::getInlinedAtScope()

    void DebugLoc::dump(LLVMContext &)
      => void DebugLoc::dump()

    void DebugLoc::getFnDebugLoc(LLVMContext &)
      => void DebugLoc::getFnDebugLoc()

    MDNode *DebugLoc::getScope(LLVMContext &)
      => MDNode *DebugLoc::getScope()

    MDNode *DebugLoc::getInlinedAt(LLVMContext &)
      => MDLocation *DebugLoc::getInlinedAt()

I've noted above the only functions that won't crash on broken code (due
to downcasting to `MDLocation`).  If your code could be dealing with
broken IR (i.e., you haven't run the verifier yet, or you've used a
temporary node that will eventually (but not yet) get RAUW'ed to an
`MDLocation`), you need to restrict yourself to those.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233599 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-30 21:19:50 +00:00
David Blaikie
f9ed6b05a5 [opaque pointer type] More IRBuilder::createGEP (non-inbounds) migrations: CodeGenPrepare and SimplifyLibCalls
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233596 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-30 20:42:56 +00:00
Peter Collingbourne
07ee8d2fc1 MC: For variable symbols, maintain MCSymbol::Section as a cache.
This fixes the visibility of symbols in certain edge cases involving aliases
with multiple levels of indirection.

Fixes PR19582.

Differential Revision: http://reviews.llvm.org/D8586

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233595 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-30 20:41:21 +00:00
Duncan P. N. Exon Smith
f175439a2b Transforms: Use the new DebugLoc API, NFC
Update lib/Analysis and lib/Transforms to use the new `DebugLoc` API.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233587 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-30 19:49:49 +00:00
Duncan P. N. Exon Smith
39acf8f243 IR: Use the new DebugLoc API, NFC
Update lib/IR and lib/Bitcode to use the new `DebugLoc` API.  Added an
explicit conversion to `bool` (avoiding a conversion to `MDLocation`),
since a couple of these use cases need to handle broken code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233585 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-30 19:40:05 +00:00
Kit Barton
9039fc77c3 [PPC] Modify HTM and crypto intrinsics to inherit from GCCBuiltin
There was a change to the way some of the HTM and crypto builtins are being
handled in Clang. Previously, some of the builtins were dealt with in the
CodeGenFunction::EmitPPCBuiltinExpr method (in order to do range checking on
constant arguments). These check will been moved to Sema
http://reviews.llvm.org/D8672), which means those builtins will not be handled
in the EmitPPCBuiltinExpr method anymore. As a result, the definition of the
intrinsics in IntrinsicsPowerPC.td needs to be modified to inherit from the
GCCBuiltin definition.

http://reviews.llvm.org/D8673


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233581 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-30 18:46:15 +00:00
Duncan P. N. Exon Smith
1c13197c9f DebugInfo: Write new DebugLoc API
Rewrite `DebugLoc` with a cleaner API that reflects its current status
as a wrapper around an `MDLocation` pointer.

  - Add accessors/constructors to/from `MDLocation`.
  - Simplify construction from `MDNode`.
  - Remove unnecessary `LLVMContext` from APIs.
  - Drop some API that isn't useful any more.
  - Rewrite documentation.

Actually, I've left the old API behind temporarily at the bottom of the
class so that I can update callers in separate commits.  I'll remove it
once the callers are updated.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233573 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-30 18:07:40 +00:00
Duncan P. N. Exon Smith
3584797a17 DebugInfo: Implement MDLocation::getInlinedAtScope()
Write `MDLocation::getInlinedAtScope()` and use it to re-implement
`DebugLoc::getScopeNode()` (and simplify `DISubprogram::Verify()`).
This follows the inlined-at linked list and returns the scope of the
deepest/last location.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233568 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-30 17:41:24 +00:00
Duncan P. N. Exon Smith
7380257f0e Verifier: Add operand checks for remaining debug info
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233565 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-30 17:21:38 +00:00
Duncan P. N. Exon Smith
d3ec0ca17e Verifier: Add operand checks for MDLexicalBlock
Add operand checks for `MDLexicalBlock` and `MDLexicalBlockFile`.  Like
`MDLocalVariable` and `MDLocation`, these nodes always require a scope.

There was no test bitrot to fix here (just updated the serialization
tests in test/Assembler/mdlexicalblock.ll).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233561 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-30 16:37:48 +00:00
Duncan P. N. Exon Smith
bd38c8d788 Verifier: Check operands of MDSubprogram nodes
Check operands of `MDSubprogram`s in the verifier, and update the
accessors and factory functions to use more specific types.

There were a lot of broken testcases, which I fixed in r233466.  If you
have out-of-tree tests for debug info, you probably need similar changes
to the ones I made there.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233559 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-30 16:19:15 +00:00
Rafael Espindola
fd45ac4635 Save a std::string.
The group names are always symbol names, so we can use a StringRef.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233545 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-30 13:59:06 +00:00
Rafael Espindola
0bd11cd898 Special case the creation of relocation sections.
These sections are never looked up and we know when have to create them. Use
that to save adding them to the regular map and avoid a symbol->string->symbol
conversion for the group symbol.

This also makes the implementation independent of the details of how unique
sections are implemented.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233539 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-30 13:39:16 +00:00
Elena Demikhovsky
f5f12f1e92 AVX-512: added intrinsics for VPAND, VPOR and VPXOR
by Asaf Badouh (asaf.badouh@intel.com)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233525 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-30 08:30:34 +00:00
Lang Hames
3c4bea043d [Orc] Add missing #include. Hopefully this will appease the modules buildbots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233510 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-30 04:02:55 +00:00
Lang Hames
da62155c11 [MCJIT][Orc] Refactor RTDyldMemoryManager, weave RuntimeDyld::SymbolInfo through
MCJIT.

This patch decouples the two responsibilities of the RTDyldMemoryManager class,
memory management and symbol resolution, into two new classes:
RuntimeDyld::MemoryManager and RuntimeDyld::SymbolResolver.

The symbol resolution interface is modified slightly, from:

  uint64_t getSymbolAddress(const std::string &Name);

to:

  RuntimeDyld::SymbolInfo findSymbol(const std::string &Name);

The latter passes symbol flags along with symbol addresses, allowing RuntimeDyld
and others to reason about non-strong/non-exported symbols.


The memory management interface removes the following method:

  void notifyObjectLoaded(ExecutionEngine *EE,
                          const object::ObjectFile &) {}

as it is not related to memory management. (Note: Backwards compatibility *is*
maintained for this method in MCJIT and OrcMCJITReplacement, see below).


The RTDyldMemoryManager class remains in-tree for backwards compatibility.
It inherits directly from RuntimeDyld::SymbolResolver, and indirectly from
RuntimeDyld::MemoryManager via the new MCJITMemoryManager class, which
just subclasses RuntimeDyld::MemoryManager and reintroduces the
notifyObjectLoaded method for backwards compatibility).

The EngineBuilder class retains the existing method:

  EngineBuilder&
  setMCJITMemoryManager(std::unique_ptr<RTDyldMemoryManager> mcjmm);

and includes two new methods:

  EngineBuilder&
  setMemoryManager(std::unique_ptr<MCJITMemoryManager> MM);

  EngineBuilder&
  setSymbolResolver(std::unique_ptr<RuntimeDyld::SymbolResolver> SR);

Clients should use EITHER:

A single call to setMCJITMemoryManager with an RTDyldMemoryManager.

OR (exclusive)

One call each to each of setMemoryManager and setSymbolResolver.

This patch should be fully compatible with existing uses of RTDyldMemoryManager.
If it is not it should be considered a bug, and the patch either fixed or
reverted.

If clients find the new API to be an improvement the goal will be to deprecate
and eventually remove the RTDyldMemoryManager class in favor of the new classes.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233509 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-30 03:37:06 +00:00
Lang Hames
8af7cb0001 [Orc] Add missing inline keyword to the function introduced in r233504.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233506 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-29 22:07:07 +00:00
Lang Hames
7a2870e2e2 [Orc] Use raw TargetAddresses for callback trampoline addresses, rather than IR.
Add convenience function for building a typed IR Constant from trampoline
addresses.
   


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233504 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-29 21:55:27 +00:00
Akira Hatanaka
971af2987a Delete MCInstPrinter::AvailableFeatures.
All the ports have been fixed to read the feature bits from the subtarget passed
to the print methods. Also, delete the call to setAvailableFeatures in the
constructor of NVPTX's instprinter as the instprinter wasn't using the feature
bits anywhere.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233486 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-28 21:07:24 +00:00
Richard Trieu
0b8cd1dee9 Fix comparison functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233467 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-28 02:37:33 +00:00
Duncan P. N. Exon Smith
b943370653 Verifier: Check operands of MDType subclasses and MDCompileUnit
Add verify checks for `MDType` subclasses and for `MDCompileUnit`.
These new checks don't yet incorporate everything from `Verify()`, but
at least they sanity check the operands.  Also downcast accessors as
possible.

A lot of these accessors can't be downcast as far as we'd like because
of arrays of typed objects (stored in a generic `MDTuple`) and
`MDString`-based type references.  Eventually I'll port over `DIRef<>`
and `DITypedArray<>` from `DebugInfo.h` to clean those up as well.

Updated bitrotted testcases separately in r233415 and r233443 to reduce
churn on the off-chance this needs to be reverted.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233446 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-27 23:05:04 +00:00
Rafael Espindola
0ac75919e1 Add two small structs for readability in place of std::pair and std::tuple. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233422 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-27 21:34:24 +00:00
Akira Hatanaka
f09378397e [MCInstPrinter] Enable MCInstPrinter to change its behavior based on the
per-function subtarget.

Currently, code-gen passes the default or generic subtarget to the constructors
of MCInstPrinter subclasses (see LLVMTargetMachine::addPassesToEmitFile), which
enables some targets (AArch64, ARM, and X86) to change their instprinter's
behavior based on the subtarget feature bits. Since the backend can now use
different subtargets for each function, instprinter has to be changed to use the
per-function subtarget rather than the default subtarget.

This patch takes the first step towards enabling instprinter to change its
behavior based on the per-function subtarget. It adds a bit "PassSubtarget" to
AsmWriter which tells table-gen to pass a reference to MCSubtargetInfo to the
various print methods table-gen auto-generates. 

I will follow up with changes to instprinters of AArch64, ARM, and X86.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233411 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-27 20:36:02 +00:00
Alexei Starovoitov
4193093152 [bpf] add support for bpf pseudo instruction
Expose bpf pseudo load instruction via intrinsic. It is used by front-ends that
can encode file descriptors directly into IR instead of relying on relocations.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233396 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-27 18:51:42 +00:00
Duncan P. N. Exon Smith
a9902daa5c Verifier: Check fields of MDVariable subclasses
Check fields from `MDLocalVariable` and `MDGlobalVariable` and change
the accessors to downcast to the right types.  `getType()` still returns
`Metadata*` since it could be an `MDString`-based reference.

Since local variables require non-null scopes, I also updated `LLParser`
to require a `scope:` field.

A number of testcases had grown bitrot and started failing with this
patch; I committed them separately in r233349.  If I just broke your
out-of-tree testcases, you're probably hitting similar problems (so have
a look there).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233389 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-27 17:29:58 +00:00
Rafael Espindola
121eb4257d Close unique sections when switching away from them.
It is not possible to switch back to unique secitons, so close them
automatically when switching away.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233380 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-27 15:01:40 +00:00
James Molloy
fb45b9fafc Reapply r233175 and r233183: float2int.
This re-adds float2int to the tree, after fixing PR23038. It turns
out the argument to APSInt() is true-if-unsigned, rather than
true-if-signed :(. Added testcase and explanatory comment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233370 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-27 10:36:57 +00:00
Sanjoy Das
7df7833eaf [NFC] Fix typo in comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233365 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-27 06:06:48 +00:00
David Majnemer
db573736fd WinEH: Create a parent frame alloca for HandlerType xdata tables
We don't have any logic to emit those tables yet, so the SDAG lowering
of this intrinsic is just a stub.  We can see the intrinsic in the
prepared IR, though.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233354 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-27 04:17:07 +00:00
Karthik Bhat
611d4bde9b Refactor Code inside LoopVectorizer's function isInductionVariable.
This patch exposes LoopVectorizer's isInductionVariable function as common
a functionality.
http://reviews.llvm.org/D8608


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233352 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-27 03:44:15 +00:00
Nick Lewycky
b3ad90eacc Revert r233175 and r233183 with it. This pulls float2int back out of the tree, due to PR23038.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233350 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-27 02:00:11 +00:00
Ahmed Bougacha
f55b1a5be4 [CodeGen] Report error rather than crash when unable to makeLibCall.
Also, make the assumption explicit in the header.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233329 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-26 22:46:58 +00:00
Duncan P. N. Exon Smith
c4eafd24f2 Verifier: Check accessors of MDLocation
Check accessors of `MDLocation`, and change them to `cast<>` down to the
right types.  Also add type-safe factory functions.

All the callers that handle broken code need to use the new versions of
the accessors (`getRawScope()` instead of `getScope()`) that still
return `Metadata*`.  This is also necessary for things like
`MDNodeKeyImpl<MDLocation>` (in LLVMContextImpl.h) that need to unique
the nodes when their operands might still be forward references of the
wrong type.

In the `Value` hierarchy, consumers that handle broken code use
`getOperand()` directly.  However, debug info nodes have a ton of
operands, and their order (even their existence) isn't stable yet.  It's
safer and more maintainable to add an explicit "raw" accessor on the
class itself.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233322 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-26 22:05:04 +00:00
Rafael Espindola
9d2f0da138 Fix PR23025.
There is something in link.exe that requires a relocation to use a
global symbol. Not doing so breaks the chrome build on windows.

This patch sets isWeak for that to work. To compensate,
we then need to look past those symbols when not creating relocations.

This patch includes an ELF test that matches GNU as behaviour.

I am still reducing the chrome build issue and will add a test
once that is done.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233318 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-26 21:11:00 +00:00
Sanjoy Das
784545fba0 [ADT][CMake][AutoConf] Fail-fast iterators for DenseMap
Summary:
This patch is an attempt at making `DenseMapIterator`s "fail-fast".
Fail-fast iterators that have been invalidated due to insertion into
the host `DenseMap` deterministically trip an assert (in debug mode)
on access, instead of non-deterministically hitting memory corruption
issues.

Enabling fail-fast iterators breaks the LLVM C++ ABI, so they are
predicated on `LLVM_ENABLE_ABI_BREAKING_CHECKS`.
`LLVM_ENABLE_ABI_BREAKING_CHECKS` by default flips with
`LLVM_ENABLE_ASSERTS`, but can be clamped to ON or OFF using the CMake /
autoconf build system.

Reviewers: chandlerc, dexonsmith, rnk, zturner

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D8351

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233310 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-26 19:25:01 +00:00
Vladimir Sukharev
27d12f3e6e [AArch64, ARM] Add v8.1a architecture and generic cpu
New architecture and cpu added, following http://community.arm.com/groups/processors/blog/2014/12/02/the-armv8-a-architecture-and-its-ongoing-development

Reviewers: t.p.northover

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D8505


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233290 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-26 17:05:54 +00:00
Simon Pilgrim
eb32048f80 [DAGCombiner] Add support for TRUNCATE + FP_EXTEND vector constant folding
This patch adds supports for the vector constant folding of TRUNCATE and FP_EXTEND instructions and tidies up the SINT_TO_FP and UINT_TO_FP instructions to match.

It also moves the vector constant folding for the FNEG and FABS instructions to use the DAG.getNode() functionality like the other unary instructions.

Differential Revision: http://reviews.llvm.org/D8593

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233224 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-25 22:30:31 +00:00
Reid Kleckner
a8b46e7055 WinEH: Create an unwind help alloca for __CxxFrameHandler3 xdata tables
We don't have any logic to emit those tables yet, so the sdag lowering
of this intrinsic is just a stub. We can see the intrinsic in the
prepared IR, though.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233209 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-25 20:10:36 +00:00
Kit Barton
bd9a548881 Add Hardware Transactional Memory (HTM) Support
This patch adds Hardware Transaction Memory (HTM) support supported by ISA 2.07
(POWER8). The intrinsic support is based on GCC one [1], but currently only the
'PowerPC HTM Low Level Built-in Function' are implemented.

The HTM instructions follows the RC ones and the transaction initiation result
is set on RC0 (with exception of tcheck). Currently approach is to create a
register copy from CR0 to GPR and comapring. Although this is suboptimal, since
the branch could be taken directly by comparing the CR0 value, it generates code
correctly on both test and branch and just return value. A possible future
optimization could be elimitate the MFCR instruction to branch directly.

The HTM usage requires a recently newer kernel with PPC HTM enabled. Tested on
powerpc64 and powerpc64le.

This is send along a clang patch to enabled the builtins and option switch.

[1] https://gcc.gnu.org/onlinedocs/gcc/PowerPC-Hardware-Transactional-Memory-Built-in-Functions.html

Phabricator Review: http://reviews.llvm.org/D8247


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233204 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-25 19:36:23 +00:00
Rafael Espindola
55f6e3b963 clang-format bits of code to make another patch readable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233203 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-25 19:24:39 +00:00
Benjamin Kramer
eaf3cbd897 [APInt] Add an isSplat helper and use it in some places.
To complement getSplat. This is more general than the binary
decomposition method as it also handles non-pow2 splat sizes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233195 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-25 16:49:59 +00:00
Rafael Espindola
d033c4b576 Fix fixup evaluation when deciding what to relocate with.
The previous logic was to first try without relocations at all
and failing that stop on the first defined symbol.

That was inefficient and incorrect in the case part of the
expression could be simplified and another part could not
(see included test).

We now stop the evaluation when we get to a variable whose value
can change (i.e. is weak).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233187 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-25 13:16:53 +00:00
Lang Hames
47fd5639bc [Orc][lli] Add a very simple Orc-based lazy JIT to lli.
This ensures that we're building and testing the CompileOnDemand layer, at least
in a basic way.

Currently x86-64 only, and with limited to no library calls enabled (depending
on host platform). Patches welcome. ;)

To enable access to the lazy JIT, this patch replaces the '-use-orcmcjit' lli
option with a new option:
'-jit-kind={ mcjit | orc-mcjit | orc-lazy }'.

All regression tests are updated to use the new option, and one trivial test of
the new lazy JIT is added.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233182 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-25 12:11:48 +00:00
James Molloy
09f1b672cb Reapply r233062: "float2int": Add a new pass to demote from float to int where possible.
Now with a fix for PR23008 and extra regression test.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233175 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-25 10:03:42 +00:00
Lang Hames
afb57c0251 [Orc] Remove extraneous 'typename'. This should cheer the bots up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233168 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-25 04:00:34 +00:00
Lang Hames
339fa95661 [Orc] Refactor JITCompileCallbackManagerBase and CompileOnDemandLayer to support
target-independent callback management.

This is a prerequisite for adding orc-based lazy-jitting to lli.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233166 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-25 02:45:50 +00:00
Chandler Carruth
ef81f7c255 [ADT] Teach MapVector to support a swap member. Will be used in
a subsequent commit in Clang.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233159 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-25 00:50:21 +00:00
Rafael Espindola
49dba99a89 Produce an error instead of asserting on invalid .sleb128/.uleb128.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233155 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-25 00:25:37 +00:00
Rafael Espindola
71be19dff2 [llvm-readobj] add support for macho universal binary.
Patch by Keyue Hu (Chilledheart)!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233107 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-24 20:26:55 +00:00
Hans Wennborg
f61cd8b368 Revert r233062 ""float2int": Add a new pass to demote from float to int where possible."
This caused PR23008, compiles failing with: "Use still stuck around after Def is
destroyed: %.sroa.speculated"

Also reverting follow-up r233064.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233105 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-24 20:07:08 +00:00
Duncan P. N. Exon Smith
1329ecfc78 DebugInfo: Reorder definitions of MDLocation and MDFile, NFC
Move definition of `MDLocation` after `MDLocalScope` so that the latter
is available for casts in the former.  Similarly, move the definition of
`MDFile` as early as possible so that other classes can cast to it in
their definitions.  (Follow-up commits will take advantage of this.)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233096 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-24 17:34:33 +00:00
Duncan P. N. Exon Smith
ab10069039 DebugInfo: Add MDLocalScope, a legal scope for locals
Add a subclass of `MDScope` to explicitly categorize the legal scopes
for locals -- in particular, scopes that are legal for `MDLocation`,
`MDLexicalBlockBase`, and `MDLocalVariable`.  This provides a convenient
`isa<>` target for the verifier, and eventually I'll be changing the
above classes' `getScope()` to specifically return it.  Currently, its
subclasses are `MDSubprogram`, `MDLexicalBlock`, and
`MDLexicalBlockFile`.

I've gone with `MDLocalScope` for now -- a little ambiguous since it's a
scope *for* locals, not a scope that's local -- but I'm open to more
descriptive names if someone can think of something better.  Regardless,
the code docs should make it clear enough.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233092 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-24 16:44:29 +00:00
Benjamin Kramer
1989d62bf1 Internalize the StackMapLiveness pass.
No need to have its own header when it's not used anywhere. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233072 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-24 13:20:54 +00:00
Michael Kuperstein
765aab84d6 Revert "Use std::bitset for SubtargetFeatures"
This reverts commit r233055.

It still causes buildbot failures (gcc running out of memory on several platforms, and a self-host failure on arm), although less than the previous time.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233068 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-24 12:56:59 +00:00
Daniel Sanders
b1058310c1 [mips] Distinguish 'R', 'ZC', and 'm' inline assembly memory constraint.
Summary:
Previous behaviour of 'R' and 'm' has been preserved for now. They will be
improved in subsequent commits.

The offset permitted by ZC varies according to the subtarget since it is
intended to match the restrictions of the pref, ll, and sc instructions.

The restrictions on these instructions are:
* For microMIPS: 12-bit signed offset.
* For Mips32r6/Mips64r6: 9-bit signed offset.
* Otherwise: 16-bit signed offset.

Reviewers: vkalintiris

Reviewed By: vkalintiris

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D8414

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233063 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-24 11:26:34 +00:00
James Molloy
a54c5b4489 "float2int": Add a new pass to demote from float to int where possible.
It is possible to have code that converts from integer to float, performs operations then converts back, and the result is provably the same as if integers were used.

This can come from different sources, but the most obvious is a helper function that uses floats but the arguments given at an inlined callsites are integers.

This pass considers all integers requiring a bitwidth less than or equal to the bitwidth of the mantissa of a floating point type (23 for floats, 52 for doubles) as exactly representable in floating point.

To reduce the risk of harming efficient code, the pass only attempts to perform complete removal of inttofp/fptoint operations, not just move them around.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233062 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-24 11:15:23 +00:00
Michael Kuperstein
d3ab717935 Use std::bitset for SubtargetFeatures
Previously, subtarget features were a bitfield with the underlying type being uint64_t. 
Since several targets (X86 and ARM, in particular) have hit or were very close to hitting this bound, switching the features to use a bitset.
No functional change.

The first time this was committed (r229831), it caused several buildbot failures. 
At least some of the ARM ones were due to gcc/binutils issues, and should now be fixed.

Differential Revision: http://reviews.llvm.org/D8542

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233055 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-24 09:17:25 +00:00
Lang Hames
1828be87da [Orc] Move delta-handling for trampoline sizes into the resolver block.
This is the first step towards adding a target-independent callback
handler API.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233049 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-24 04:27:02 +00:00
Lang Hames
cac4b37ed8 [Orc] Whitespace fix. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233048 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-24 04:07:28 +00:00
Lang Hames
736b9fd95c [Orc] Use std::string to capture name by value.
This just updates the code to reflect the comment, but this bug actually hit the
out-of-tree lazy demo. I'm working on a patch to add the lazy-demo's
functionality to lli so that we can test this in-tree soon.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233047 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-24 04:07:01 +00:00
Duncan P. N. Exon Smith
9e6a05f572 Remove dead prototype DebugInfoFinder::processExpression(), NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233031 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-23 22:10:27 +00:00
Duncan P. N. Exon Smith
7ad96398c6 DebugInfo: Overload get() in DIDescriptor subclasses
Continue to simplify the `DIDescriptor` subclasses, so that they behave
more like raw pointers.  Remove `getRaw()`, replace it with an
overloaded `get()`, and overload the arrow and cast operators.  Two
testcases started to crash on the arrow operators with this change
because of `scope:` references that weren't real scopes.  I fixed them.
Soon I'll add verifier checks for them too.

This also adds explicit dereference operators.  Previously, the builtin
dereference against `operator MDNode *()` would have worked, but now the
builtins are ambiguous.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233030 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-23 21:54:07 +00:00
Rafael Espindola
79cd79b1e6 Refactor how passes get a symbol at the end of a section.
There is now a canonical symbol at the end of a section that different
passes can request.

This also allows us to assert that we don't switch back to a section whose
end symbol has already been printed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233026 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-23 21:22:04 +00:00
David Blaikie
c71d3d47a0 Refactor: simplify boolean expressions in llvm-objdump
Simplify boolean expressions involving `true` and `false` with `clang-tidy`.

Actually upon inspection a bunch of these boolean variables could be
factored away entirely anyway - using find_if and then testing the
result before using it. This also helps reduce indentation in the code
anyway - and a bunch of other related simplification fell out nearby so
I just committed all of that.

Patch by Richard Thomson (legalize@xmission.com)

Differential Revision: http://reviews.llvm.org/D8517

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232984 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-23 18:39:02 +00:00
Benjamin Kramer
ebe8742dd9 More missing includes only visible to MSVC.
NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232981 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-23 18:23:08 +00:00
Benjamin Kramer
df93f4bb0b Purge unused includes throughout libSupport.
NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232976 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-23 18:07:13 +00:00
Petar Jovanovic
15863e5e5f Fix sign extension for MIPS64 in makeLibCall function
Fixing sign extension in makeLibCall for MIPS64. In MIPS64 architecture all
32 bit arguments (int, unsigned int, float 32 (soft float)) must be sign
extended. This fixes test "MultiSource/Applications/oggenc/".

Patch by Strahinja Petrovic.

Differential Revision: http://reviews.llvm.org/D7791


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232943 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-23 12:28:13 +00:00
Benjamin Kramer
00edfaecf0 FoldingSet: Make FoldingSetImpl's dtor protected and non-virtual
It's not intended to be polymorphically deleted. Make FoldingSet
and ContextualFoldingSet final to avoid noise from -Wnon-virtual-dtor.

No functional change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232922 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-22 18:22:33 +00:00
Benjamin Kramer
b1c9f1f84e StringRef: Just forward StringRef::find to libc's memchr.
Modern libc's have an SSE version of memchr which is a lot faster than our
hand-rolled version. In the past I was reluctant to use it because Darwin's
memchr used a naive ridiculously slow implementation, but that has been fixed
some versions ago.

Should have zero functional impact.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232898 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-21 16:42:35 +00:00
Benjamin Kramer
f85c601683 Revert accidental commit.
While this is a fun change, I didn't really test it :)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232897 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-21 15:37:32 +00:00
Benjamin Kramer
4b74df7229 SimplifyLibCalls: Add basic optimization of memchr calls.
This is just memchr(x, y, 0) -> nullptr and constant folding.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232896 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-21 15:36:21 +00:00
Eric Christopher
4638c99333 Remove the target independent TargetMachine::getSubtarget and
TargetMachine::getSubtargetImpl routines.

This keeps the target independent code free of bare subtarget
calls while the remainder of the backends are migrated, or not
if they don't wish to support per-function subtargets as would
be needed for function multiversioning or LTO of disparate
cpu subarchitecture types, e.g.

clang -msse4.2 -c foo.c -emit-llvm -o foo.bc
clang -c bar.c -emit-llvm -o bar.bc
llvm-link foo.bc bar.bc -o baz.bc
llc baz.bc

and get appropriate code for what the command lines requested.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232885 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-21 04:22:23 +00:00
Eric Christopher
f2b4a7f862 Forward the Function based getSubtarget call to the appropriate Impl
call.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232881 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-21 03:32:45 +00:00
Eric Christopher
ba617ac1cc Change getISAEncoding to use the target triple to determine
thumb-ness similar to the rest of the Module level asm printing
infrastructure as debug info finalization happens after the function
may be missing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232875 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-21 03:13:01 +00:00
Filipe Cabecinhas
e3f2e6fcfe Make getLastArgNoClaim work for up to 4 arguments.
Summary:
This is needed for http://reviews.llvm.org/D8507
I have no idea what stand-alone tests could be done, if needed.

Reviewers: Bigcheese, craig.topper, samsonov

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D8508

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232859 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-20 23:32:58 +00:00
Eric Christopher
aaca69b339 Remove dead calls and function arguments dealing with TRI in StackMaps.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232847 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-20 21:05:18 +00:00
Duncan P. N. Exon Smith
e2305f7e90 DebugInfo: Require valid DIDescriptors
As part of PR22777, switch from `dyn_cast_or_null<>` to `cast<>` in most
`DIDescriptor` accessors.  These classes are lightweight wrappers around
pointers, so the users should check for valid pointers before using
them.

This survives a Darwin clang -g bootstrap (after fixing testcases), but
it's possible the bots will complain about other configurations.  I'll
fix any fallout as quickly as I can!  Once this bakes for a bit I'll
remove the macros.

Note that `DebugLoc` implicitly gets stricter with this change as well,
since it forward to `DILocation`.  Any code that's using `DebugLoc`
accessors should check `DebugLoc::isUnknown()` first.  (BTW, I'm also
partway through a cleanup of the `DebugLoc` API to make it more obvious
what it is (a glorified pointer wrapper) and remove cruft from before
the Metadata/Value split.  I'll commit soon.)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232844 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-20 20:17:07 +00:00
Rafael Espindola
d80979b25d Don't declare all text sections at the start of the .s
The code this patch removes was there to make sure the text sections went
before the dwarf sections. That is necessary because MachO uses offsets
relative to the start of the file, so adding a section can change relaxations.

The dwarf sections were being printed at the start just to produce symbols
pointing at the start of those sections.

The underlying issue was fixed in r231898. The dwarf sections are now printed
when they are about to be used, which is after we printed the text sections.

To make sure we don't regress, the patch makes the MachO streamer assert
if CodeGen puts anything unexpected after the DWARF sections.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232842 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-20 20:00:01 +00:00
John Brawn
151a5da534 [ARM] Fix handling of thumb1 out-of-range frame offsets
LocalStackSlotPass assumes that isFrameOffsetLegal doesn't change its
answer when the base register changes. Unfortunately this isn't true
in thumb1, where SP-based loads allow a larger offset than
non-SP-based loads, and this causes the base register reuse code to
generate instructions that are unencodable, causing an assertion
failure. 

Solve this by adding a BaseReg parameter to isFrameOffsetLegal, which
ARMBaseRegisterInfo can then make use of to give the correct answer. 

Differential Revision: http://reviews.llvm.org/D8419


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232825 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-20 17:20:07 +00:00
Eric Christopher
aa6604c351 Rewrite StackMap location handling to pre-compute the dwarf register
numbers before emission.

This removes a dependency on being able to access TRI at the module
level and is similar to the DwarfExpression handling. I've modified
the debug support into print/dump routines that'll do the same dumping
but is now callable anywhere and if TRI isn't available will go ahead
and just print out raw register numbers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232821 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-20 16:03:42 +00:00
Eric Christopher
051c9e751b Use the cached subtarget off of the machine function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232782 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-19 23:06:21 +00:00
Eric Christopher
0d6199b3af Add an MCSubtargetInfo variable to the TargetMachine.
This enables us to remove calls to the subtarget from the TargetMachine
and with a small hack for backends that require global subtarget
information for module level code generation, e.g. mips abi flags, as
mentioned in a fixme in the code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232776 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-19 22:36:37 +00:00
Eric Christopher
d802a47f96 Add a TargetMachine local MCRegisterInfo and MCInstrInfo so that
they can be used without a subtarget in constructing subtarget
independent passes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232775 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-19 22:36:32 +00:00
Duncan P. N. Exon Smith
a60d430e31 Verifier: Remove the separate -verify-di pass
Remove `DebugInfoVerifierLegacyPass` and the `-verify-di` pass.
Instead, call into the `DebugInfoVerifier` from inside
`VerifierLegacyPass::finalizeModule()`.  This better matches the logic
in `verifyModule()` (used by the new PassManager), avoids requiring two
separate passes to verify the IR, and makes the API for "add a pass to
verify the IR" simple.

Note: the `-verify-debug-info` flag still works (for now, at least;
eventually it might make sense to just remove it).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232772 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-19 22:24:17 +00:00
Peter Collingbourne
416d8ecf80 libLTO, llvm-lto, gold: Introduce flag for controlling optimization level.
This change also introduces a link-time optimization level of 1. This
optimization level runs only the globaldce pass as well as cleanup passes for
passes that run at -O0, specifically simplifycfg which cleans up lowerbitsets.

http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20150316/266951.html

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232769 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-19 22:01:00 +00:00
Duncan P. N. Exon Smith
0dda07ad4d PassManagerBuilder: Remove effectively dead 'StripDebug' option
`StripDebug` was only used by tools/opt/opt.cpp in
`AddStandardLinkPasses()`, but opt.cpp adds the same pass based on its
command-line flag before it calls `AddStandardLinkPasses()`.  Stripping
debug info twice isn't very useful.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232765 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-19 21:37:17 +00:00
Rafael Espindola
c7c4c36694 Split the object streamer callback in one per file format.
There are two main advantages to doing this

* Targets that only need to handle one of the formats specially don't have
  to worry about the others. For example, x86 now only registers a
  constructor for the COFF streamer.

* Changes to the arguments passed to one format constructor will not impact
  the other formats.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232699 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-19 01:50:16 +00:00
Matthias Braun
5101c89f13 Do not track subregister liveness when it brings no benefits
Some subregisters are only to indicate different access sizes, while not
providing any way to actually divide the register up into multiple
disjunct parts. Avoid tracking subregister liveness in these cases as it
is not beneficial.

Differential Revision: http://reviews.llvm.org/D8429

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232695 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-19 00:21:58 +00:00
Eric Christopher
7648d6f293 Revert "Add a TargetMachine local MCRegisterInfo and MCInstrInfo so that"
Committed too early.

This reverts commit r232666.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232667 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-18 20:41:44 +00:00
Eric Christopher
6fcce7ee77 Add a TargetMachine local MCRegisterInfo and MCInstrInfo so that
they can be used without a subtarget in constructing subtarget
independent passes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232666 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-18 20:37:36 +00:00
Rafael Espindola
325aa050d5 Fix use of uninitialized valued.
Should bring the bots back.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232661 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-18 19:49:29 +00:00
Rafael Espindola
bd23c08119 Add a default implementation of createObjectStreamer.
This removes duplicated code from backends that don't need to do anything
fancy.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232658 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-18 19:08:20 +00:00
Krzysztof Parzyszek
f795de029a [Hexagon] Intrinsics for circular and bit-reversed loads and stores
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232645 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-18 16:23:44 +00:00
Yaron Keren
b52cdda782 clang-format these lines to fix Visual C++ warning.
Visual C++ 2013 complains "warning C4138: '*/' found outside of comment"
about the code

 CallInst */*CI*/

but compiles OK. clang-formatting these lines adds an extra space and
makes Visual C++ satisfied.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232630 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-18 12:50:00 +00:00
John Brawn
0328ca6cd7 [ARM] Align stack objects passed to memory intrinsics
Memcpy, and other memory intrinsics, typically tries to use LDM/STM if
the source and target addresses are 4-byte aligned. In CodeGenPrepare
look for calls to memory intrinsics and, if the object is on the
stack, 4-byte align it if it's large enough that we expect that memcpy
would want to use LDM/STM to copy it.

Differential Revision: http://reviews.llvm.org/D7908


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232627 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-18 12:01:59 +00:00
Yaron Keren
703b185464 Remove many superfluous SmallString::str() calls.
Now that SmallString is a first-class citizen, most SmallString::str()
calls are not required. This patch removes a whole bunch of them, yet
there are lots more.

There are two use cases where str() is really needed:
1) To use one of StringRef member functions which is not available in
SmallString.
2) To convert to std::string, as StringRef implicitly converts while 
SmallString do not. We may wish to change this, but it may introduce
ambiguity.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232622 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-18 10:17:07 +00:00
NAKAMURA Takumi
1484f91953 Split comma-separated \param(s). [-Wdocumentation]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232584 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-18 02:09:25 +00:00
Sanjoy Das
e027d74733 [SCEV] Make isImpliedCond smarter.
Summary:
This change teaches isImpliedCond to infer things like "X sgt 0" => "X -
1 sgt -1".  The `ConstantRange` class has the logic to do the heavy
lifting, this change simply gets ScalarEvolution to exploit that when
reasonable.

Depends on D8345

Reviewers: atrick

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D8346

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232576 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-18 00:41:29 +00:00
Sanjoy Das
da5f3a3ca5 [ConstantRange] Split makeICmpRegion in two.
Summary:
This change splits `makeICmpRegion` into `makeAllowedICmpRegion` and
`makeSatisfyingICmpRegion` with slightly different contracts.  The first
one is useful for determining what values some expression //may// take,
given that a certain `icmp` evaluates to true.  The second one is useful
for determining what values are guaranteed to //satisfy// a given
`icmp`.

Reviewers: nlewycky

Reviewed By: nlewycky

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D8345

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232575 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-18 00:41:24 +00:00
David Majnemer
7605cdd6e4 COFF: Let globals with private linkage reside in their own section
COFF COMDATs (for selection kinds other than 'select any') require at
least one non-section symbol in the symbol table.
Satisfy this by morally enhancing the linkage from private to internal.

Differential Revision: http://reviews.llvm.org/D8394

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232570 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-17 23:54:51 +00:00
Yaron Keren
7fa3dea12d Remove StringRef->std::string->StringRef conversions.
As StringInit::get() accepts StringRef there is no need 
to construct a std::string out of the StringRef input and
then construct a new StringRef from the std::string.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232551 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-17 21:33:38 +00:00
Duncan P. N. Exon Smith
887a867862 DebugInfo: Drop fake DW_TAG_expression
Break MDExpression off of DebugNode (inherit directly from `MDNode`) and
drop the fake `DW_TAG_expression` tag in the process.

AFAICT, there's no real functionality change here.  The tag was
originally used by `DIDescriptor::isExpression()` to discriminate
between `MDNode`s, but in the new hierarchy we don't need that.

Fixes PR22780.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232550 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-17 21:32:46 +00:00
David Majnemer
76d3a99d10 Revert "COFF: Let globals with private linkage reside in their own section"
This reverts commit r232539.  This was committed accidently.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232543 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-17 20:41:11 +00:00
David Majnemer
6129538ade Revert "Address review comments"
This reverts commit r232540.  This was committed accidently.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232541 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-17 20:40:21 +00:00
David Majnemer
468fbb3c2b Address review comments
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232540 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-17 20:39:40 +00:00
David Majnemer
6526150f82 COFF: Let globals with private linkage reside in their own section
Summary:
COFF COMDATs (for selection kinds other than 'select any') require at
least one non-section symbol in the symbol table.
Satisfy this by morally enhancing the linkage from private to internal.

Reviewers: rafael

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D8374

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232539 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-17 20:39:25 +00:00
Rafael Espindola
b415e6b2f2 Centralize the handling of unique ids for temporary labels.
Before this patch code wanting to create temporary labels for a given entity
(function, cu, exception range, etc) had to keep its own counter to have stable
symbol names.

createTempSymbol would still add a suffix to make sure a new symbol was always
returned, but it kept a single counter. Because of that, if we were to use
just createTempSymbol("cu_begin"), the label could change from cu_begin42 to
cu_begin43 because some other code started using temporary labels.

Simplify this by just keeping one counter per prefix and removing the various
specialized counters.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232535 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-17 20:07:06 +00:00
Michael Zolotukhin
5850602050 TLI: Add addVectorizableFunctionsFromVecLib.
Also, add several entries to vectorizable functions table, and
corresponding tests. The table isn't complete, it'll be populated later.

Review: http://reviews.llvm.org/D8131

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232531 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-17 19:50:55 +00:00
Michael Zolotukhin
6e046d3810 TTI: Honour cost model for estimating cost of vector-intrinsic and calls.
Review: http://reviews.llvm.org/D8096

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232528 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-17 19:37:28 +00:00
Michael Zolotukhin
51b4d85c62 TTI: Add getCallInstrCost.
Review: http://reviews.llvm.org/D8094

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232524 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-17 19:26:23 +00:00
Michael Zolotukhin
06aab08788 TLI: Add interface for querying whether a function is vectorizable.
Review: http://reviews.llvm.org/D8093

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232523 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-17 19:22:30 +00:00
Yaron Keren
6279aae989 Remove LookupSymbol(StringRef) and optimize LookupSymbol(Twine).
Same as MakeArgString in r232465, keep only LookupSymbol(Twine)
while making sure it handles the StringRef like cases efficiently
using twine::toStringRef.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232517 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-17 18:55:30 +00:00
Daniel Sanders
4bb6aeb874 [systemz] Distinguish the 'Q', 'R', 'S', and 'T' inline assembly memory constraints.
Summary:
But still handle them the same way since I don't know how they differ on
this target.

No functional change intended.

Reviewers: uweigand

Reviewed By: uweigand

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D8251


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232495 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-17 16:16:14 +00:00
Shankar Easwaran
abc795d1f6 [Object][ELF] ELFEntityIterator : Add operators for random access
Fix review comments from djasper.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232494 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-17 15:44:20 +00:00
Rafael Espindola
0bea785427 Remove the error prone GetTempSymbol API.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232487 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-17 15:02:17 +00:00
Rafael Espindola
b80d90e9d0 Make EmitFunctionHeader a private helper.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232481 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-17 14:38:30 +00:00
Daniel Sanders
42c951a74c Re-commit: [hexagon] Distinguish the 'o', 'v', and 'm' inline assembly memory constraints.
Summary:
But still handle them the same way since I don't know how they differ on
this target.

No functional change intended.

Reviewers: kparzysz, adasgupt

Reviewed By: kparzysz, adasgupt

Subscribers: colinl, llvm-commits

Differential Revision: http://reviews.llvm.org/D8204

Like for the PowerPC target, I've had to add 'i' to the constraint mappings in
order to pass 2007-12-17-InvokeAsm.ll. It's not clear why 'i' has historically
been treated as a memory constraint.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232480 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-17 14:37:39 +00:00
Rafael Espindola
a480f88b3c Move the EH symbol to the asm printer and use it for the SJLJ case too.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232475 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-17 13:57:48 +00:00
Daniel Sanders
06c5d245a2 Fix r232466 by adding 'i' to the mappings for inline assembly memory constraints.
It's not completely clear why 'i' has historically been treated as a memory
constraint. According to the documentation, it represents a constant immediate.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232470 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-17 12:00:04 +00:00
Renato Golin
ce1f16421f [ARM] Add support for ARMV6K subtarget (LLVM)
ARMv6K is another layer between ARMV6 and ARMV6T2. This is the LLVM
side of the changes.

ARMV6 family LLVM implementation.

+-------------------------------------+
| ARMV6                               |
+----------------+--------------------+
| ARMV6M (thumb) | ARMV6K (arm,thumb) | <- From ARMV6K and ARMV6M processors
+----------------+--------------------+    have support for hint instructions
| ARMV6T2 (arm,thumb,thumb2)          |    (SEV/WFE/WFI/NOP/YIELD). They can
+-------------------------------------+    be either real or default to NOP.
| ARMV7 (arm,thumb,thumb2)            |    The two processors also use
+-------------------------------------+    different encoding for them.

Patch by Vinicius Tinti.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232468 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-17 11:55:28 +00:00