Commit Graph

28088 Commits

Author SHA1 Message Date
Juergen Ributzka
d3cf783ed1 [Constant Hoisting] Make the constant materialization cost operand dependent
Extend the target hook to take also the operand index into account when
calculating the cost of the constant materialization.

Related to <rdar://problem/16381500>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204435 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-21 06:04:45 +00:00
Jiangning Liu
705e53e2aa This reverts commit r203762, "ARM: support emission of complex SO expressions".
The commit r203762 introduced silent failure for complext SO expression, and it's even worse than compiler crash.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204427 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-21 02:51:01 +00:00
Kevin Qin
287cc35cd7 [AArch64] Remove .data_region directive from AArch64.
.data_region is only used in Darwin, so it shouldn't be generated
for other OS. Currently AArch64 doesn't support darwin yet, so
I removed it from AArch64. When Darwin is supported someday, we can
add it back and associate it with Darwin.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204424 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-21 02:12:48 +00:00
Weiming Zhao
4eb2d228e9 Fix PR19136: [ARM] Fix Folding SP Update into vpush/vpop
Sicne MBB->computeRegisterLivenes() returns Dead for sub regs like s0,
d0 is used in vpop instead of updating sp, which causes s0 dead before
its use.

This patch checks the liveness of each subreg to make sure the reg is
actually dead.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204411 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-20 23:28:16 +00:00
Juergen Ributzka
ee3242ed0b Revert "[Constant Hoisting] Extend coverage of the constant hoisting pass."
I will break this up into smaller pieces for review and recommit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204393 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-20 20:17:13 +00:00
Juergen Ributzka
228c72a841 [Constant Hoisting] Extend coverage of the constant hoisting pass.
This commit extends the coverage of the constant hoisting pass, adds additonal
debug output and updates the function names according to the style guide.

Related to <rdar://problem/16381500>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204389 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-20 19:55:52 +00:00
Matt Arsenault
31bd14fc2d R600: Remove unused method declaration.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204357 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-20 16:41:06 +00:00
Kai Nacke
ebf9f0c6cb [MIPS] Add cpu octeon and some instructions
The Octeon cpu from Cavium Networks is mips64r2 based and has an extended
instruction set. In order to utilize this with LLVM, a new cpu feature "octeon"
and a subtarget feature "cnmips" is added. A small set of new instructions
(baddu, dmul, pop, dpop, seq, sne) is also added. LLVM generates dmul, pop and
dpop instructions with option -mcpu=octeon or -mattr=+cnmips.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204337 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-20 11:51:58 +00:00
Zoran Jovanovic
37fb9b9591 Provide an operand for microMIPS wait instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204329 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-20 10:41:37 +00:00
Zoran Jovanovic
3ac3e7451b Implementation of microMIPS 16-bit instructions MOVE and JALR.
Differential Revision: http://llvm-reviews.chandlerc.com/D3112


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204325 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-20 10:18:24 +00:00
Zoran Jovanovic
b71fd20f2d Mark alias symbols as microMIPS if necessary. Differential Revision: http://llvm-reviews.chandlerc.com/D3080
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204323 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-20 09:44:49 +00:00
Matheus Almeida
affc53dcde [mips] Splitting up class definition from implementation.
Also removed some unnecessary #includes.

No functional changes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204320 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-20 09:29:54 +00:00
Alexey Samsonov
471e0ba850 Add llvm_unreachable after fully-covered switches to appease GCC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204318 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-20 07:30:40 +00:00
Saleem Abdulrasool
9320b807aa Reapply 'ARM IAS: support .thumb_set'
Re-apply the change after it was reverted to do conflicts due to another change
being reverted.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204306 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-20 06:05:33 +00:00
Craig Topper
badf4cb75a [X86] Check return value of readSIB in disassembler so errors propagate. In particular this makes a too short instruction with a missing SIB byte fail.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204305 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-20 05:56:00 +00:00
Hao Liu
19a3e9aabe [ARM]Fix an assertion failure in A15SDOptimizer about DPair reg class by treating DPair as QPR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204304 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-20 05:36:59 +00:00
Rafael Espindola
0a70f9b3b9 Look through variables when computing relocations.
Given

bar = foo + 4
	.long bar

MC would eat the 4. GNU as includes it in the relocation. The rule seems to be
that a variable that defines a symbol is used in the relocation and one that
does not define a symbol is evaluated and the result included in the relocation.

Fixing this unfortunately required some other changes:

* Since the variable is now evaluated, it would prevent the ELF writer from
  noticing the weakref marker the elf streamer uses. This patch then replaces
  that with a VariantKind in MCSymbolRefExpr.

* Using VariantKind then requires us to look past other VariantKind to see

	.weakref	bar,foo
	call	bar@PLT

  doing this also fixes

	zed = foo +2
	call zed@PLT

  so that is a good thing.

* Looking past VariantKind means that the relocation selection has to use
  the fixup instead of the target.

This is a reboot of the previous fixes for MC. I will watch the sanitizer
buildbot and wait for a build before adding back the previous fixes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204294 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-20 02:12:01 +00:00
Matt Arsenault
925147ca20 R600/SI: Add unused LDS 2 form instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204275 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-19 22:19:56 +00:00
Matt Arsenault
e3620da269 R600/SI: Add support for 64-bit LDS writes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204274 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-19 22:19:54 +00:00
Matt Arsenault
62b3e22092 R600/SI: Add support for 64-bit LDS loads.
v2:
  -Use correct opcode for DS_READ_64

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204273 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-19 22:19:52 +00:00
Matt Arsenault
6eaa49233f R600/SI: Match i16 immediate offset of LDS instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204272 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-19 22:19:49 +00:00
Matt Arsenault
9c0b2d08d3 R600/SI: Don't display the GDS bit.
It isn't actually used now, and probably never will be, plus it makes
tests less annoying. I also think SC prints GDS instructions as a
separate instruction name.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204270 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-19 22:19:43 +00:00
Matt Arsenault
6d1781733d R600/SI: Merge offset0 and offset1 fields for single address DS instructions v2
Also remove unused data fields from the DS_Load_Helper class.

v2:
  - Merge fields for DS_WRITE

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204269 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-19 22:19:39 +00:00
Matheus Almeida
e7f8a0b47a [mips] 80-column.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204252 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-19 16:29:06 +00:00
Craig Topper
59ae7294ef Prune includes in X86 target.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204216 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-19 06:53:25 +00:00
Rafael Espindola
025e94d7dc Revert "Add back r203962, r204028 and r204059."
This reverts commit r204178.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204203 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-19 00:13:43 +00:00
Rafael Espindola
4af106a677 Add back r203962, r204028 and r204059.
This reverts commit r204137.

This includes a fix for handling aliases of aliases.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204178 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-18 20:40:38 +00:00
Hans Wennborg
523f800e90 X86 memcpy lowering: use "rep movs" even when esi is used as base pointer
For functions where esi is used as base pointer, we would previously fall back
from lowering memcpy with "rep movs" because that clobbers esi.

With this patch, we just store esi in another physical register, and restore
it afterwards. This adds a little bit of register preassure, but the more
efficient memcpy should be worth it.

Differential Revision: http://llvm-reviews.chandlerc.com/D2968

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204174 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-18 20:04:34 +00:00
Manuel Jacob
7e18b99f1e X86: Use enums for memory operand decoding instead of integer literals.
Summary:
X86BaseInfo.h defines an enum for the offset of each operand in a memory operand
sequence.  Some code uses it and some does not.  This patch replaces (hopefully)
all remaining locations where an integer literal was used instead of this enum.
No functionality change intended.

Reviewers: nadav

CC: llvm-commits, t.p.northover

Differential Revision: http://llvm-reviews.chandlerc.com/D3108

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204158 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-18 16:14:11 +00:00
Krzysztof Parzyszek
3da56299df Enable CFI on Hexagon.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204157 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-18 16:02:37 +00:00
Bill Schmidt
d4585b941a Fix PR19144: Incorrect offset generated for int-to-fp conversion at -O0.
When converting a signed 32-bit integer to double-precision floating point on
hardware without a lfiwax instruction, we have to instead use a lfd followed
by fcfid.  We were erroneously offsetting the address by 4 bytes in
preparation for either a lfiwax or lfiwzx when generating the lfd.  This fixes
that silly error.

This was not caught in the test suite since the conversion tests were run with
-mcpu=pwr7, which implies availability of lfiwax.  I've added another test
case for older hardware that checks the code we expect in the absence of
lfiwax and other flavors of fcfid.  There are fewer tests in this test case
because we punt to DAG selection in more cases on older hardware.  (We must
generate complex fiddly sequences in those cases, and there is marginal
benefit in duplicating that logic in fast-isel.)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204155 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-18 14:32:50 +00:00
Alexander Kornienko
8a99824c5a Revert r203962 and two revisions depending on it: r204028 and r204059.
The revision I'm reverting breaks handling of transitive aliases. This blocks us
and breaks sanitizer bootstrap:
http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-bootstrap/builds/2651
(and checked locally by Alexey).

This revision is the result of:

  svn merge -r204059:204058 -r204028:204027 -r203962:203961 .

+ the regression test added to test/MC/ELF/alias.s

Another way to reproduce the regression with clang:
  $ cat q.c
  void a1();
  void a2() __attribute__((alias("a1")));
  void a3() __attribute__((alias("a2")));
  void a1() {}

  $ ~/work/llvm-build/bin/clang-3.5-good -c q.c && mv q.o good.o && \
      ~/work/llvm-build/bin/clang-3.5-bad -c q.c && mv q.o bad.o && \
      objdump -t good.o bad.o

    good.o:     file format elf64-x86-64

    SYMBOL TABLE:
    0000000000000000 l    df *ABS*  0000000000000000 q.c
    0000000000000000 l    d  .text  0000000000000000 .text
    0000000000000000 l    d  .data  0000000000000000 .data
    0000000000000000 l    d  .bss   0000000000000000 .bss
    0000000000000000 l    d  .comment       0000000000000000 .comment
    0000000000000000 l    d  .note.GNU-stack        0000000000000000 .note.GNU-stack
    0000000000000000 l    d  .eh_frame      0000000000000000 .eh_frame
    0000000000000000 g     F .text  0000000000000006 a1
    0000000000000000 g     F .text  0000000000000006 a2
    0000000000000000 g     F .text  0000000000000006 a3



    bad.o:     file format elf64-x86-64

    SYMBOL TABLE:
    0000000000000000 l    df *ABS*  0000000000000000 q.c
    0000000000000000 l    d  .text  0000000000000000 .text
    0000000000000000 l    d  .data  0000000000000000 .data
    0000000000000000 l    d  .bss   0000000000000000 .bss
    0000000000000000 l    d  .comment       0000000000000000 .comment
    0000000000000000 l    d  .note.GNU-stack        0000000000000000 .note.GNU-stack
    0000000000000000 l    d  .eh_frame      0000000000000000 .eh_frame
    0000000000000000 g     F .text  0000000000000006 a1
    0000000000000000 g     F .text  0000000000000006 a2
    0000000000000000 g       .text  0000000000000000 a3




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204137 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-18 10:36:11 +00:00
Alon Mishne
086494730d [C++11] Change DebugInfoFinder to use range-based loops
Also changes the iterators to return actual DI type over MDNode.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204130 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-18 09:41:07 +00:00
Craig Topper
a9d93e3c74 [C++11] Mark the target fast isel classes as 'final' so that the compiler can de-virtualize some of the internal calls.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204123 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-18 07:27:13 +00:00
Saleem Abdulrasool
96be4240bb ARM: add an assertion
Add an assertion that a valid section is referenced.  The potential NULL pointer
dereference was identified by the clang static analyzer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204114 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-18 05:26:55 +00:00
Matt Arsenault
9f44c113bd Make methods static
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204085 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-17 22:23:09 +00:00
Matt Arsenault
2683baa8ac R600: Match sign_extend_inreg to BFE instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204072 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-17 18:58:11 +00:00
Adam Nemet
131ab020c3 [X86] Fix unused variable warning with NDEBUG from r204058
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204063 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-17 17:32:53 +00:00
Saleem Abdulrasool
5b5e5abd20 ARM IAS: support .thumb_set
This performs the equivalent of a .set directive in that it creates a symbol
which is an alias for another symbol or value which may possibly be yet
undefined.  This directive also has the added property in that it marks the
aliased symbol as being a thumb function entry point, in the same way that the
.thumb_func directive does.

The current implementation fails one test due to an unrelated issue.  Functions
within .thumb sections are not marked as thumb_func.  The result is that
the aliasee function is not valued correctly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204059 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-17 17:13:54 +00:00
Adam Nemet
8c8fe42a0d [VectorLegalizer/X86] Don't unvectorize fp_to_uint for v8f32->v8i16
Rather than LegalizeAction::Expand, this needs LegalizeAction::Promote to get
promoted to fp_to_sint v8f32->v8i32.  This is a legal operation on AVX.

For that to work properly, we also need to teach the legalizer about the
specific promotion required here.  The default vector promotion uses
bitcasting to a vector type of the same total size.  We want to promote the
vector element type, effectively widening the operation and then truncating
the result.  This is analogous to the current logic of how int_to_fp is
promoted.

The change also factors out some code from the int_to_fp promotion code to
ValueType::widenIntegerVectorElementType.  This is now shared between
int_to_fp and fp_to_int.

There is no longer need for the custom lowering of fp_to_sint f32->v8i16 in
X86.  It can now go through the new target-independent fp_to_*int promotion
logic.

I also checked that no other target uses Promote for these ops yet, so there
shouldn't be any unexpected change in behavior.

Fixes <rdar://problem/16202247>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204058 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-17 17:06:14 +00:00
Tom Stellard
ad52f4f70c R600/SI: Fix implementation of isInlineConstant() used by the verifier
The type of the immediates should not matter as long as the encoding is
equivalent to the encoding of one of the legal inline constants.

Tested-by: Michel Dänzer <michel.daenzer@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204056 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-17 17:03:52 +00:00
Tom Stellard
eb7876083d R600/SI: Use correct dest register class for V_READFIRSTLANE_B32
This instructions writes to an 32-bit SGPR.  This change required adding
the 32-bit VCC_LO and VCC_HI registers, because the full VCC register
is 64 bits.

This fixes verifier errors on several of the indirect addressing piglit
tests.

Tested-by: Michel Dänzer <michel.daenzer@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204055 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-17 17:03:51 +00:00
Tom Stellard
27b614fcd3 R600/SI: Add generic checks to SIInstrInfo::verifyInstruction()
Added checks for number of operands and operand register classes.

Tested-by: Michel Dänzer <michel.daenzer@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204054 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-17 17:03:49 +00:00
Lang Hames
3dd951e842 [X86] New and improved VZeroUpperInserter optimization.
- Adds support for inserting vzerouppers before tail-calls.
  This is enabled implicitly by having MachineInstr::copyImplicitOps preserve
  regmask operands, which allows VZeroUpperInserter to see where tail-calls use
  vector registers.

- Fixes a bug that caused the previous version of this optimization to miss some
  vzeroupper insertion points in loops. (Loops-with-vector-code that followed
  loops-without-vector-code were mistakenly overlooked by the previous version).

- New algorithm never revisits instructions.

Fixes <rdar://problem/16228798>



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204021 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-17 01:22:54 +00:00
Arnaud A. de Grandmaison
3c143dde40 Remove some dead assignements found by scan-build
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204013 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-15 22:13:15 +00:00
Patrik Hagglund
8a8f5c396f Replace ValueTypes.h with MachineValueType.h if possible.
Utilize the previous move of MVT to a separate header for all trivial
cases (that don't need any further restructuring).

Reviewed By: Tim Northover

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204003 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-15 09:11:41 +00:00
Matt Arsenault
2345166d2f R600: Remove unnecessary attempt to zext a pointer.
Private pointers are now always 32-bits.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203989 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-15 00:08:26 +00:00
Matt Arsenault
2cf43de915 R600: Code cleanup.
Use sign_extend_inreg and getZeroExtendInReg instead of
using the bit operations they expand into.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203988 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-15 00:08:22 +00:00
Duncan P. N. Exon Smith
4fc4769a53 x86: Add missing break to getCallPreservedMask()
This change brings getCallPreservedMask()'s logic in line with
getCalleeSavedRegs().

While this changes the control flow slightly, the change is not
currently observable.  is64Bit must be false to get to the accidental
fallthrough, but the case that we fall into (coldcc) does nothing unless
is64Bit is true.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203943 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-14 16:29:21 +00:00
Duncan P. N. Exon Smith
71e585e4ce x86: NFC: Make getCallPreservedMask() more similar to getCalleeSavedRegs()
Changing order of checks in getCallPreservedMask() to match
getCalleeSavedRegs() so that the logic is easier to compare.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203939 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-14 16:09:13 +00:00