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Author SHA1 Message Date
Dan Gohman
3bdf5fe71a Factor out code into HandleVirtRegDef, for consistency with 
Handle{Virt,Phys}Reg{Def,Use}. Remove a redundant check
for register zero, and redundant checks for isPhysicalRegister.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56412 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-21 21:11:41 +00:00
Owen Anderson
134eb73fc3 Fetch the starting index of the block when assigning intervals. This gets live-in indices 
correct in the presence of things like EH labels.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56410 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-21 20:43:24 +00:00
Chris Lattner
ca19a3fd11 don't print GlobalAddressSDNode's with an offset of zero as "foo0". 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56399 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-21 18:38:31 +00:00
Dale Johannesen
34d8f7559c Teach coalescer about earlyclobber bits. 
Check bits for preferred register.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56384 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-20 02:03:04 +00:00
Evan Cheng
5e8d9def77 Fix PR2808. When regalloc runs out of register, it spill a physical register around the live interval being allocated. Do not continue to try to spill another register, just grab the physical register and move on. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56381 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-20 01:28:05 +00:00
Evan Cheng
fee2d6937c Continue after removing the current MI. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56372 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-19 22:49:39 +00:00
Dan Gohman
2ff7fd1461 Refactor X86SelectConstAddr, folding it into X86SelectAddress. This 
results in better code for globals. Also, unbreak the local CSE for
GlobalValue stub loads.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56371 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-19 22:16:54 +00:00
Dale Johannesen
d6bd733534 Make earlyclobber stuff work when virtual regs 
have previously been assigned conflicting physreg.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56364 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-19 18:52:31 +00:00
Evan Cheng
20580a1cf6 Re-materalized definition instructions may be dead. Whack them. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56352 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-19 17:38:47 +00:00
Dale Johannesen
fa48f94130 Remove AsmThatEarlyClobber etc. from LiveIntervalAnalysis 
and redo as linked list walk.  Logic moved into RA.
Per review feedback.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56326 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-19 01:02:35 +00:00
Evan Cheng
841ee1a12b Somehow RegAllocLinearScan is keeping two pointers to MachineRegisterInfo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56314 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-18 22:38:47 +00:00
Dan Gohman
e251b1529f Don't consider instructions with implicit physical register 
defs to be necessarily live.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56310 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-18 18:22:32 +00:00
Dan Gohman
ee2e403545 Add a new "fast" scheduler. This is currently basically just a 
copy of the BURRList scheduler, but with several parts ripped
out, such as backtracking, online topological sort maintenance
(needed by backtracking), the priority queue, and Sethi-Ullman
number computation and maintenance (needed by the priority
queue). As a result of all this, it generates somewhat lower
quality code, but that's its tradeoff for running about 30%
faster than list-burr in -fast mode in many cases.

This is somewhat experimental. Moving forward, major pieces of
this can be refactored with pieces in common with
ScheduleDAGRRList.cpp.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56307 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-18 16:26:26 +00:00
Dale Johannesen
91aac1015e Add a bit to mark operands of asm's that conflict 
with an earlyclobber operand elsewhere.  Propagate
this bit and the earlyclobber bit through SDISel.
Change linear-scan RA not to allocate regs in a way 
that conflicts with an earlyclobber.  See also comments.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56290 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-17 21:13:11 +00:00
Evan Cheng
870e4bef41 Unallocatable registers do not have live intervals. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56287 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-17 18:36:25 +00:00
Dan Gohman
59932584a8 Don't worry about clobbering physical register defs that aren't used. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56281 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-17 15:25:49 +00:00
Dan Gohman
d3ead4329e Add a new MachineInstr-level DCE pass. It is very simple, and is intended to 
be used with fast-isel.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56268 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-17 00:43:24 +00:00
Evan Cheng
1cd332725f When converting a CopyFromReg to a copy instruction, use the register class of its uses to determine the right destination register class of the copy. This is important for targets where a physical register may belong to multiple register classes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56258 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-16 23:12:11 +00:00
Dan Gohman
50284d81f8 Change SelectionDAG::getConstantPool to always set the alignment of the 
ConstantPoolSDNode, using the target's preferred alignment for the
constant type.

In LegalizeDAG, when performing loads from the constant pool, the
ConstantPoolSDNode's alignment is used in the calls to getLoad and
getExtLoad.

This change prevents SelectionDAG::getLoad/getExtLoad from incorrectly
choosing the ABI alignment for constant pool loads when Alignment == 0.
The incorrect alignment is only a performance issue when ABI alignment
does not equal preferred alignment (i.e., on x86 it was generating
MOVUPS instead of MOVAPS for v4f32 constant loads when the default ABI
alignment for 128bit vectors is forced to 1 byte.)

Patch by Paul Redmond!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56253 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-16 22:05:41 +00:00
Bill Wendling
056292fd73 Reverting r56249. On further investigation, this functionality isn't needed. 
Apologies for the thrashing.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56251 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-16 21:48:12 +00:00
Dan Gohman
aed48bfee8 Include the alignment value when displaying ConstantPoolSDNodes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56250 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-16 21:18:22 +00:00
Bill Wendling
9468a9b6be - Change "ExternalSymbolSDNode" to "SymbolSDNode". 
- Add linkage to SymbolSDNode (default to external).
- Change ISD::ExternalSymbol to ISD::Symbol.
- Change ISD::TargetExternalSymbol to ISD::TargetSymbol

These changes pave the way to allowing SymbolSDNodes with non-external linkage.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56249 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-16 21:12:30 +00:00
Dan Gohman
05ae98346a Fix these comments to reflect current reality. Surprisingly, 
MachineConstantPool::getConstantPoolIndex actually expects
a log2-encoded alignment.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56248 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-16 20:45:53 +00:00
Dan Gohman
1937e2f6ca Don't take the time to CheckDAGForTailCallsAndFixThem when tail calls 
are not enabled. Instead just omit the tail call flag when calls are
created.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56235 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-16 01:42:28 +00:00
Owen Anderson
99500aeb7c Live intervals for live-in registers should begin at the beginning of a basic block, not at the first 
instruction.  Also, their valno's should have an unknown def.  This has no effect currently, but was
causing issues when StrongPHIElimination was enabled.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56231 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-15 22:00:38 +00:00
Dan Gohman
5eb0cecbc5 Re-enable SelectionDAG CSE for calls. It matters in the case of 
libcalls, as in this testcase on ARM.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56226 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-15 19:46:03 +00:00
Evan Cheng
25f34a30d6 Correctly update kill infos after extending a live range and merge 2 val#'s; fix 56165 - do not mark val# copy field if the copy does not define the val#. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56199 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-15 06:28:41 +00:00
Dale Johannesen
e009180f2b adjust last patch per review feedback 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56194 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-14 01:44:36 +00:00
Dan Gohman
014278e6a1 Remove isImm(), isReg(), and friends, in favor of 
isImmediate(), isRegister(), and friends, to avoid confusion
about having two different names with the same meaning. I'm
not attached to the longer names, and would be ok with
changing to the shorter names if others prefer it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56189 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-13 17:58:21 +00:00
Dan Gohman
095cc29f32 Define CallSDNode, an SDNode subclass for use with ISD::CALL. 
Currently it just holds the calling convention and flags
for isVarArgs and isTailCall.

And it has several utility methods, which eliminate magic
5+2*i and similar index computations in several places.

CallSDNodes are not CSE'd. Teach UpdateNodeOperands to handle
nodes that are not CSE'd gracefully.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56183 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-13 01:54:27 +00:00
Evan Cheng
ee9e1b0a85 On some targets, non-move instructions can become move instructions because of coalescing. e.g. 
vr2 = OR vr0, vr1
=>
vr2 = OR vr1, vr1   // after coalescing vr0 with vr1

Update the value# of the destination register with the copy instruction if that happens.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56165 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-12 18:13:14 +00:00
Dan Gohman
4fbd796a12 Change ConstantSDNode and ConstantFPSDNode to use ConstantInt* and 
ConstantFP* instead of APInt and APFloat directly.

This reduces the amount of time to create ConstantSDNode
and ConstantFPSDNode nodes when ConstantInt* and ConstantFP*
respectively are already available, as is the case in
SelectionDAGBuild.cpp. Also, it reduces the amount of time
to legalize constants into constant pools, and the amount of
time to add ConstantFP operands to MachineInstrs, due to
eliminating ConstantInt::get and ConstantFP::get calls.

It increases the amount of work needed to create new constants
in cases where the client doesn't already have a ConstantInt*
or ConstantFP*, such as legalize expanding 64-bit integer constants
to 32-bit constants. And it adds a layer of indirection for the
accessor methods. But these appear to be outweight by the benefits
in most cases.

It will also make it easier to make ConstantSDNode and
ConstantFPNode more consistent with ConstantInt and ConstantFP.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56162 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-12 18:08:03 +00:00
Dale Johannesen
913d3dfac4 Pass "earlyclobber" bit through to machine 
representation; coalescer and RA need to know
about it.  No functional change.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56161 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-12 17:49:03 +00:00
Dan Gohman
f5aeb1a8e4 Rename ConstantSDNode::getValue to getZExtValue, for consistency 
with ConstantInt. This led to fixing a bug in TargetLowering.cpp
using getValue instead of getAPIntValue.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56159 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-12 16:56:44 +00:00
Dale Johannesen
e2f2083f9c The sequence for ppcf128 compares was not IEEE 
safe in the presence of NaNs.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56136 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-12 00:30:56 +00:00
Evan Cheng
8db866808c Fix PR2748. Avoid coalescing physical register with virtual register which would create illegal extract_subreg. e.g. 
vr1024 = extract_subreg vr1025, 1
...
vr1024 = mov8rr AH
If vr1024 is coalesced with AH, the extract_subreg is now illegal since AH does not have a super-reg whose sub-register 1 is AH.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56118 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-11 20:07:10 +00:00
Evan Cheng
4086906a0f Fix PR2783 - coalescer bug. Missing a TargetRegisterInfo::isVirtualRegister check. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56112 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-11 18:40:32 +00:00
Evan Cheng
3885578a36 Fix a 80 column violation. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56097 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-11 05:58:06 +00:00
Evan Cheng
d9c553f262 Propagate subreg index when promoting a load to a copy. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56085 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-11 01:02:12 +00:00
Dan Gohman
74321abb4f FastISel support for i1 PHI nodes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56069 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-10 21:01:31 +00:00
Dan Gohman
8211648757 FastISel support for i1 constants. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56068 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-10 21:01:08 +00:00
Owen Anderson
369e98760b Fix a bug in the coalescer where it didn't check if a live interval existed before trying to manipulate it. This 
was exposed by fast isel's handling of shifts on X86-64.  With this, FreeBench/pcompress2 passes on X86-64 in fast isel.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56067 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-10 20:41:13 +00:00
Dan Gohman
0586d91bb3 Add X86FastISel support for static allocas, and refences 
to static allocas. As part of this change, refactor the
address mode code for laods and stores.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56066 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-10 20:11:02 +00:00
Evan Cheng
014264b70f Fix PR2664 - spiller GetRegForReload wasn't respecting sub-register indices on machine operands. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56065 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-10 20:08:45 +00:00
Dan Gohman
3ee25dca5b Add a break statement that I accidentally deleted when 
I shuffled the fast-isel command-line options around. This fixes
a bunch of fast-isel failures.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56057 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-10 15:52:34 +00:00
Bill Wendling
fc2508eb78 Remove unnecessary bit-wise AND from the limited precision work. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56049 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-10 06:26:10 +00:00
Daniel Dunbar
c0c3b9a3d0 Fix 80 col violation. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56048 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-10 04:16:29 +00:00
Evan Cheng
8ec3389aaf Fix typo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56037 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-10 00:30:50 +00:00
Bill Wendling
277fc24a7c Check that both operands are f32 before attempting to lower. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56036 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-10 00:24:59 +00:00
Bill Wendling
aeb5c7b353 Implement "visitPow". This is mainly used to see if we have a pow() call of this 
form:

          powf(10.0f, x);

If this is the case, and also we want limited precision floating-point
calculations, then lower to do the limited-precision stuff.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56035 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-10 00:20:20 +00:00
Evan Cheng
9d24ac56e1 A few more places where FPOW is being ignored. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56032 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-09 23:35:53 +00:00
Dan Gohman
4344a5d0d7 Change -fast-isel-no-abort to -fast-isel-abort, which now defaults 
to being off by default. Also, add assertion checks to check that
the various fast-isel-related command-line options are only used
when -fast-isel itself is enabled.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56029 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-09 23:05:00 +00:00
Evan Cheng
4b88702ac3 Legalizer was missing code that expand fpow to a libcall. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56028 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-09 23:02:14 +00:00
Bill Wendling
e10c814c52 Adding 6-, 12-, and 18-bit limited-precision floating-point support for exp2 
function.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56025 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-09 22:39:21 +00:00
Dale Johannesen
d2e51af035 Move the uglier parts of deciding not to emit a 
UsedDirective for some symbols in llvm.used into
Darwin-specific code.  I've decided LessPrivateGlobal
is potentially a useful abstraction and left it in
the target-independent area, with improved comment.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56024 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-09 22:29:13 +00:00
Bill Wendling
b4ec283049 Add support for 6-, 12-, and 18-bit limited precision calculations of exp for 
floating-point numbers.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56023 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-09 22:13:54 +00:00
Dan Gohman
293d5f8bc0 Add a new option, -fast-isel-verbose, that can be used with 
-fast-isel-no-abort to get a dump of all unhandled instructions,
without an abort.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56021 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-09 22:06:46 +00:00
Evan Cheng
3ef2d60e95 Clear preference when it no longer makes sense. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56019 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-09 21:44:23 +00:00
Owen Anderson
0d95267e49 Clean this up, based on Evan's suggestions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56009 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-09 20:47:17 +00:00
Bill Wendling
3915025a4f - Add support for 6-, 12-, and 18-bit limited precision floating-point "log" 
values.
- Refactored some of the code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56008 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-09 20:39:27 +00:00
Evan Cheng
5530216989 Fix PR2757. Ignore liveinterval register allocation preference if the preference register is not in the right register class. This can happen due to sub-register coalescing. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56006 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-09 20:22:01 +00:00
Anton Korobeynikov
19e861a4ff Make safer variant of alias resolution routine to be default 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56005 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-09 20:05:04 +00:00
Bill Wendling
bd297bcd4a Add limited precision floating-point conversions of log10 for 6- and 18-bit 
precisions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56000 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-09 18:42:23 +00:00
Owen Anderson
baf37cd556 Check for type legality before materializing integer constants in fast isel. With this change, 
all of MultiSource/Applications passes on Darwin/X86 under FastISel.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55982 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-09 06:32:02 +00:00
Dan Gohman
cf01f7a78c Remove the code that protected FastISel from aborting in 
the case of loads, stores, and conditional branches. It can
handle those now, so any that aren't handled should trigger
the abort.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55977 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-09 02:40:04 +00:00
Evan Cheng
59fbc80f6b Fix a constant lowering bug. Now we can do load and store instructions with funky getelementptr embedded in the address operand. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55975 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-09 01:26:59 +00:00
Dale Johannesen
b2dfb89e0e Fix logic for not emitting no-dead-strip for some 
objects in llvm.used (thanks Anton).  Makes visible
the magic 'l' prefix for symbols on Darwin which are
to be passed through the assembler, then removed at
linktime (previously all references to this had been
hidden in the ObjC FE code, oh well).



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55973 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-09 01:21:22 +00:00
Bill Wendling
3eb594013f Add support for floating-point calculations of log2 with limited precisions of 6 
and 18.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55968 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-09 00:28:24 +00:00
Dale Johannesen
14b0a2b137 Don't suppress no-dead-strip for used static functions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55962 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-08 21:21:49 +00:00
Anton Korobeynikov
a0e8a1e5d3 Reapply 55904: Unbreak and fix indentation 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55958 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-08 21:13:56 +00:00
Dan Gohman
a8657e3587 Fix a few I's that were meant to be renamed to BI's. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55942 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-08 20:37:59 +00:00
Dale Johannesen
07cabb9432 Redo the 3 existing low-precision expansions to 
use float constants.  An oversight by the numerics
people who supplied this.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55930 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-08 18:00:26 +00:00
Bill Wendling
a425e0073d Reverting r55898 to r55909. One of these patches was causing an ICE during the full bootstrap on Darwin: 
/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.obj/./gcc/xgcc
-B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.obj/./gcc/
-B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/bin/
-B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/lib/
-isystem /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/include
-isystem /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/sys-include
-O2  -O2 -g -O2  -DIN_GCC    -W -Wall -Wwrite-strings
-Wstrict-prototypes -Wmissing-prototypes -Wold-style-definition
-isystem ./include  -fPIC -pipe -g -DHAVE_GTHR_DEFAULT -DIN_LIBGCC2
-D__GCC_FLOAT_NOT_NEEDED  -I. -I. -I../../llvm-gcc.src/gcc
-I../../llvm-gcc.src/gcc/. -I../../llvm-gcc.src/gcc/../include
-I./../intl -I../../llvm-gcc.src/gcc/../libcpp/include
-I../../llvm-gcc.src/gcc/../libdecnumber -I../libdecnumber
-I/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.obj/include
-I/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/include
-DSHARED -m64 -DL_negdi2 -c ../../llvm-gcc.src/gcc/libgcc2.c -o
libgcc/x86_64/_negdi2_s.o
Assertion failed: (TargetRegisterInfo::isVirtualRegister(regA) &&
TargetRegisterInfo::isVirtualRegister(regB) && "cannot update physical
register live information"), function runOnMachineFunction, file
/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/lib/CodeGen/TwoAddressInstructionPass.cpp,
line 311.
/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.obj/./gcc/xgcc
-B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.obj/./gcc/
-B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/bin/
-B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/lib/
-isystem /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/include
-isystem /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/sys-include
-O2  -O2 -g -O2  -DIN_GCC    -W -Wall -Wwrite-strings
-Wstrict-prototypes -Wmissing-prototypes -Wold-style-definition
-isystem ./include  -fPIC -pipe -g -DHAVE_GTHR_DEFAULT -DIN_LIBGCC2
-D__GCC_FLOAT_NOT_NEEDED  -I. -I. -I../../llvm-gcc.src/gcc
-I../../llvm-gcc.src/gcc/. -I../../llvm-gcc.src/gcc/../include
-I./../intl -I../../llvm-gcc.src/gcc/../libcpp/include
-I../../llvm-gcc.src/gcc/../libdecnumber -I../libdecnumber
-I/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.obj/include
-I/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/include
-DSHARED -m64 -DL_lshrdi3 -c ../../llvm-gcc.src/gcc/libgcc2.c -o
libgcc/x86_64/_lshrdi3_s.o
../../llvm-gcc.src/gcc/unwind-dw2.c:1527: internal compiler error: Abort trap
Please submit a full bug report,
with preprocessed source if appropriate.
See <URL:http://developer.apple.com/bugreporter> for instructions.
{standard input}:unknown:Undefined local symbol LBB21_11
{standard input}:unknown:Undefined local symbol LBB21_12
{standard input}:unknown:Undefined local symbol LBB21_13
{standard input}:unknown:Undefined local symbol LBB21_8


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55928 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-08 17:59:12 +00:00
Dan Gohman
942ca7f808 In visitUREM, arrange for the temporary UDIV node to be 
revisited, consistent with the code in visitSREM.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55923 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-08 16:59:01 +00:00
Daniel Dunbar
1e0e04caac Add VISIBILITY_HIDDEN on SDISelAsmOperandInfo 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55922 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-08 16:56:08 +00:00
Dan Gohman
82f94f1ad9 Add AsmPrinter support for i128 and larger static initializer data. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55919 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-08 16:40:13 +00:00
Dan Gohman
a47916d379 Fix the string for ISD::UDIVREM. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55917 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-08 16:30:29 +00:00
Evan Cheng
9f1185076d Avoid redefinition and nnbreak windows build. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55911 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-08 16:01:27 +00:00
Anton Korobeynikov
d4fde0b11c Unbreak and fix indentation 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55904 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-08 14:23:34 +00:00
Evan Cheng
5960e4eb68 Add fast isel physical register definition support. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55892 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-08 08:38:20 +00:00
Bill Wendling
9a0d1ba051 Revert my previous change -- the subtraction of two constants was a no-op 
before. This is taken care of in the selection DAG pass. In my opinion, this
should be in one place or the other. I.e., it should probably be removed from
the DAG combiner (along with the other arithmetic transformations on constants
that are essentially no-ops).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55889 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-08 01:56:32 +00:00
Bill Wendling
ca460d5a39 Convert 
// fold (sub c1, c2) -> c1-c2

from a no-op into an actual transformation.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55886 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-07 11:34:47 +00:00
Evan Cheng
f09917847b Indentation. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55880 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-07 09:04:52 +00:00
Evan Cheng
c7fcfa07d9 - Doh. Pass vector by value is bad. 
- Add a AnalyzeCallResult specialized for calls which produce a single value. This is used by fastisel.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55879 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-07 09:02:18 +00:00
Dale Johannesen
853244f8a6 Next limited float precision expansion (log2 12 bits) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55866 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-05 23:49:37 +00:00
Owen Anderson
6e6074508c Revert r55859. This is breaking the build in the abscence of its companion commit. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55865 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-05 23:36:01 +00:00
Dan Gohman
8a11053f3c Move the code that inserts copies for function livein registers 
out of ScheduleDAGEmit.cpp and into SelectionDAGISel.cpp. This
allows it to be run exactly once per function, even if multiple
SelectionDAG iterations happen in the entry block, as may happen
with FastISel.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55863 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-05 22:59:21 +00:00
Dale Johannesen
852680a8fa Add the next limited-precision expansion. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55856 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-05 21:27:19 +00:00
Dan Gohman
638c6830c6 FastISel support for AND and OR with type i1. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55846 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-05 18:44:22 +00:00
Dale Johannesen
59e577f73c Add hooks for other intrinsics to get low-precision expansions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55845 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-05 18:38:42 +00:00
Dan Gohman
40b189e4e2 FastISel support for ConstantExprs. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55843 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-05 18:18:20 +00:00
Dan Gohman
be0034e3c2 Revert r55817. It broke PIC. FastISel will need to find a different 
approach here.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55842 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-05 18:13:01 +00:00
Evan Cheng
c89d2feb35 Add a variant of AnalyzeCallOperands that can be used by fast isel. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55838 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-05 16:59:26 +00:00
Duncan Sands
1c11debc94 "Fix" PR2762. The testcase now crashes codegen 
elsewhere due to a missing pattern for
v2f64 = sint_to_fp v2i32.  That is PR2687.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55828 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-05 08:13:35 +00:00
Dan Gohman
3dd168d445 Fix a search+replace-o. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55824 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-05 01:58:21 +00:00
Dale Johannesen
601d3c0145 Add -flimit-float-precision to enable some faster, 
but less accurate (non-IEEE) code sequences for
certain math library functions.  Add the first of
several such expansions.  Don't worry, if you don't
turn it on it won't affect you.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55823 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-05 01:48:15 +00:00
Dan Gohman
087c8507e5 FastISel support for unreachable. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55818 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-05 01:08:41 +00:00
Dan Gohman
c7f4a8a80c In FastISel mode, the scheduler may be invoked multiple times 
in the same block. Fix the entry-block handling to only run at
at the beginning of the entry block, and not any other times.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55817 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-05 01:07:48 +00:00
Owen Anderson
95267a1e67 Add initial support for selecting constant materializations that require constant 
pool loads on X86 in fast isel.  This isn't actually used yet.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55814 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-05 00:06:23 +00:00
Dan Gohman
5b2298005d Add an include of SmallSet.h. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55793 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-04 20:49:27 +00:00