Commit Graph

86633 Commits

Author SHA1 Message Date
Jakub Staszak
de7c8530c8 Remove DOS line endings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167968 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-14 20:18:34 +00:00
Benjamin Kramer
2dbe929685 X86: Enable SSE memory intrinsics even when stack alignment is less than 16 bytes.
The stack realignment code was fixed to work when there is stack realignment and
a dynamic alloca is present so this shouldn't cause correctness issues anymore.

Note that this also enables generation of AVX instructions for memset
under the assumptions:
- Unaligned loads/stores are always fast on CPUs supporting AVX
- AVX is not slower than SSE
We may need some tweaked heuristics if one of those assumptions turns out not to
be true.

Effectively reverts r58317. Part of PR2962.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167967 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-14 20:08:40 +00:00
Hal Finkel
97d19ebe5b Replace std::vector -> SmallVector in BBVectorize
For now, this uses 8 on-stack elements. I'll need to do some profiling
to see if this is the best number.

Pointed out by Jakob in post-commit review.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167966 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-14 19:53:27 +00:00
Nadav Rotem
c7d180257c Update my email address and update the code ownership
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167965 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-14 19:47:48 +00:00
Dmitri Gribenko
0fab191994 FileCheck.rst: change formatting of code-like constructs to use a monospaced
font.  These were formatted in bold, but that's not correct.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167964 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-14 19:42:32 +00:00
Nadav Rotem
50b66387e3 The code pattern "imm0_255_neg" is used for checking if an immediate value is a small negative number.
This patch changes the definition of negative from -0..-255 to -1..-255. I am changing this because of
a bug that we had in some of the patterns that assumed that "subs" of zero does not set the carry flag.

rdar://12028498



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167963 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-14 19:39:15 +00:00
Justin Holewinski
714a587115 Add myself as code owner for NVPTX target
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167962 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-14 19:36:27 +00:00
Sean Silva
17e7b5c1e3 docs: nuke GCCFEBuildInstrs.html
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167961 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-14 19:34:48 +00:00
Justin Holewinski
a20067b5d4 [NVPTX] Implement custom lowering of loads/stores for i1
Loads from i1 become loads from i8 followed by trunc
Stores to i1 become zext to i8 followed by store to i8

Fixes PR13291

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167948 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-14 19:19:16 +00:00
Anton Korobeynikov
2337dd7c86 Fix comment
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167947 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-14 19:17:44 +00:00
Anton Korobeynikov
062a6c8380 Fix really stupid ARM EHABI info generation bug: we should not emit
eh table and handler data if there are no landing pads in the function.
Patch by Logan Chien with some cleanups from me.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167945 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-14 19:13:30 +00:00
Chad Rosier
2d80fb22b7 Claim ownership.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167943 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-14 18:43:21 +00:00
Hal Finkel
d7a3425f06 Fix the largest offender of determinism in BBVectorize
Iterating over the children of each node in the potential vectorization
plan must happen in a deterministic order (because it affects which children
are erased when two children conflict). There was no need for this data
structure to be a map in the first place, so replacing it with a vector
is a small change.

I believe that this was the last remaining instance if iterating over the
elements of a Dense* container where the iteration order could matter.
There are some remaining iterations over std::*map containers where the order
might matter, but so long as the Value* for instructions in a block increase
with the order of the instructions in the block (or decrease) monotonically,
then this will appear to be deterministic.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167942 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-14 18:38:11 +00:00
Benjamin Kramer
6a7e85c198 Sort the code owner list alphabetically. Add myself as lib/DebugInfo owner.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167940 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-14 18:17:45 +00:00
Jim Grosbach
3ca6382120 X86: Better diagnostics for 32-bit vs. 64-bit mode mismatches.
When an instruction as written requires 32-bit mode and we're assembling
in 64-bit mode, or vice-versa, issue a more specific diagnostic about
what's wrong.

rdar://12700702

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167937 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-14 18:04:47 +00:00
Matt Beaumont-Gay
7af4b9b33a s/assert/llvm_unreachable/
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167936 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-14 17:58:11 +00:00
Eric Christopher
7c8e9602f4 Grab debug information for code ownership.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167933 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-14 17:33:40 +00:00
Alexey Samsonov
659c052dfb [TSan] fix indentation
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167928 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-14 14:33:59 +00:00
Alexey Samsonov
15ab115df5 Emit relocations from .debug_aranges to .debug_info for asm files
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167926 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-14 09:55:38 +00:00
Patrik Hägglund
1e65676a12 Revert some redundant parts of r142605.
This seems like redundant leftovers from r142288 - exposing
TargetData::parseSpecifier to LLParser - which got reverted. Removes
redunant td != NULL checks in parseSpecifier, and simplifies the
interface to parseSpecifier and init.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167924 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-14 09:04:56 +00:00
Craig Topper
1ab489a42d Set FFLOOR of vectors to expand to keep intruction selection from failing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167922 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-14 08:11:25 +00:00
Hal Finkel
0e4a1679aa Mark myself as owner of BBVectorize and PowerPC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167921 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-14 07:59:10 +00:00
Andrew Trick
85d6e1dc74 Accepting ownership of scheduling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167917 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-14 07:04:23 +00:00
Craig Topper
55de339dad Factor out an overly replicated typecast. No functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167916 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-14 06:41:09 +00:00
Craig Topper
509bd72576 Set FFLOOR for vectors to expand on CellSPU to keep instruction selection from failing on llvm.floor of a vector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167914 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-14 05:56:30 +00:00
Craig Topper
32631d1a5a Add newlines to end of debug messages.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167913 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-14 05:20:09 +00:00
Rafael Espindola
8e2b8ae3b1 Handle DAG CSE adding new uses during ReplaceAllUsesWith. Fixes PR14333.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167912 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-14 05:08:56 +00:00
Sean Silva
c35ce700fe docs: Fix Sphinx toctree warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167905 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-14 01:49:23 +00:00
Anton Korobeynikov
25efd6d556 Use TARGET2 relocation for TType references on ARM.
Do some cleanup of the code while here.

Inspired by patch by Logan Chien!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167904 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-14 01:47:00 +00:00
Sean Silva
78e786b58f docs: chmod -x HowToUseInstrMappings.rst
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167903 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-14 01:41:58 +00:00
Matt Beaumont-Gay
f1c2a6b512 Fix broken asserts. Also, spell 'indices' correctly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167894 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-14 00:21:27 +00:00
Michael J. Spencer
768a707fdf [Object] Fix endianess bug by refactoring Archive::Symbol::getMember.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167893 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-14 00:04:13 +00:00
Nadav Rotem
e123fd9c59 use the getSplat API. Patch by Paul Redmond.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167892 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-14 00:02:13 +00:00
Eric Christopher
242343d1ab Revert "Use the 'count' attribute instead of the 'upper_bound' attribute."
temporarily as it is breaking the gdb bots.

This reverts commit r167806/e7ff4c14b157746b3e0228d2dce9f70712d1c126.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167886 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-13 23:30:43 +00:00
Jim Grosbach
b9a350e298 Acknowledge code ownership of MC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167882 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-13 23:01:35 +00:00
Joe Abbey
f7450a19b5 Assignment of Bitcode ownership to Joe Abbey, after announcing proposal on
LLVMdev and not hearing any major objections.  Although it did spark a nice 
discussion regarding what it means to own something in LLVM.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167881 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-13 22:32:15 +00:00
Andrew Trick
a6aae0273a Revert -join-splitedges to a boolean cmd line option.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167880 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-13 22:19:48 +00:00
Andrew Trick
3106aa125e The MachineScheduler does not currently require JoinSplitEdges.
This option will eventually either be enabled unconditionally or
replaced by a more general live range splitting optimization.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167879 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-13 22:15:40 +00:00
Michael J. Spencer
4de5872ded [MC][COFF] Emit weak symbols to the correct section. Patch by Dmitry Puzirev!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167877 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-13 22:04:09 +00:00
NAKAMURA Takumi
2aac6161e4 Revert r167836, "llvm/test/Other/close-stderr.ll: Mark it as XFAIL:mingw32 for now.", corresponding to r167849.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167876 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-13 21:57:42 +00:00
Ulrich Weigand
51abc9877e Add test case to verify correct relocs being generated for
TLS symbols on PowerPC using the integrated assembler.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167875 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-13 21:53:43 +00:00
Shankar Easwaran
a8028e5884 numerically sort the symbols, so that the testcase result is uniform
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167872 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-13 21:01:11 +00:00
Daniel Dunbar
ed074e9a1b llvm-nm: Make sort more stable when symbol names are equal.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167866 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-13 19:39:55 +00:00
Ulrich Weigand
ba6086818d Add (some) PowerPC TLS relocation types to ELF.h and
generate them from PPCELFObjectWriter::getRelocTypeInner
as appropriate.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167864 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-13 19:24:36 +00:00
Ulrich Weigand
8f887369cb Fix wrong PowerPC instruction opcodes for:
- lwaux
 - lhzux
 - stbu


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167863 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-13 19:21:31 +00:00
Ulrich Weigand
4ff09818a9 Fix wrong PowerPC instruction encodings due to
operand field name mismatches in:
 - AForm_3  (fmul, fmuls)
 - XFXForm_5 (mtcrf)
 - XFLForm (mtfsf)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167862 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-13 19:19:46 +00:00
Ulrich Weigand
18430436ca Fix instruction encoding for "bd(n)z" on PowerPC,
by using a new instruction format BForm_1.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167861 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-13 19:15:52 +00:00
Ulrich Weigand
bc40df3f22 Fix instruction encoding for "isel" on PowerPC,
using a new instruction format AForm_4.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167860 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-13 19:14:19 +00:00
Manman Ren
2adc503f29 X86: when constructing VZEXT_LOAD from other loads, makes sure its output
chain is correctly setup.

As an example, if the original load must happen before later stores, we need
to make sure the constructed VZEXT_LOAD is constrained to be before the stores.

rdar://12684358


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167859 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-13 19:13:05 +00:00
Ulrich Weigand
b64e2115de Do not consider a machine instruction that uses and defines the same
physical register as candidate for common subexpression elimination
in MachineCSE.

This fixes a bug on PowerPC in MultiSource/Applications/oggenc/oggenc
caused by MachineCSE invalidly merging two separate DYNALLOC insns.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167855 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-13 18:40:58 +00:00