Commit Graph

11 Commits

Author SHA1 Message Date
Kevin Enderby
0b9325c97d More tweaks to X86 instructions to allow the 'w' suffix in places it makes
sense, when the instruction takes the 16-bit ax register or m16 memory
location.  These changes to llvm-mc matches what the darwin assembler allows
for these instructions.  Also added the missing flex (without the wait prefix)
and ud2a as an alias to ud2 (still to add ud2b).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117031 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 17:16:46 +00:00
Kevin Enderby
87f4a1a433 Added a few tweaks to the Intel Descriptor-table support instructions to allow
word forms and suffixed versions to match the darwin assembler in 32-bit and
64-bit modes.  This is again for use just with assembly source for llvm-mc .


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116773 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-19 00:01:44 +00:00
Kevin Enderby
7aef62ff8c Added a handful of x86-32 instructions that were missing so that llvm-mc would
be more complete.  These are only expected to be used by llvm-mc with assembly
source so there is no pattern, [], in the .td files.  Most are being added to
X86InstrInfo.td as Chris suggested and only comments about register uses are
added.  Suggestions welcome on the .td changes as I'm not sure on every detail
of the x86 records.  More missing instructions will be coming.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116716 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-18 17:04:36 +00:00
Chris Lattner
508fc4708b Replace a gross hack (the MOV64ri_alt instruction) with a slightly less
gross hack (having the asmmatcher handle the alias).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115685 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-05 21:09:45 +00:00
Eli Friedman
d32d85e5ba Add 3DNowA instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115477 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-03 20:23:13 +00:00
Chris Lattner
591d76ea5a the immediate field of pshufw is actually an 8-bit field, not a 8-bit field that is sign extended. This fixes PR8288
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115473 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-03 19:09:13 +00:00
Chris Lattner
cc07d7116a add support for the prefetch/prefetchw instructions, move femms into
the right file.  The assembler supports all the 3dnow instructions now,
but not the "3dnowa" ones.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115468 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-03 18:42:30 +00:00
Chris Lattner
f132fa0e74 what the heck, add support for the rest of the 3dNow! binary operations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115467 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-03 18:24:18 +00:00
Chris Lattner
548abfcbd6 Implement support for the bizarre 3DNow! encoding (which is unlike anything
else in X86), and add support for pavgusb.  This is apparently the
only instruction (other than movsx) that is preventing ffmpeg from building
with clang.

If someone else is interested in banging out the rest of the 3DNow! 
instructions, it should be quite easy now.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115466 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-03 18:08:05 +00:00
Chris Lattner
d476914607 fix a regression introduced in r115243, in which the instruction
backing int_x86_ssse3_pshuf_w got removed.  This caused PR8280.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115422 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-02 21:32:15 +00:00
Chris Lattner
3286db670c move X86 subdir up a level
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115292 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-01 04:32:20 +00:00