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16086 Commits

Author SHA1 Message Date
Eric Christopher
744c7c8e1b 32-bit constant ints only for now. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115001 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-28 22:47:54 +00:00
Oscar Fuentes
3609eb0de2 Removed a bunch of unnecessary target_link_libraries. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114999 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-28 22:39:14 +00:00
Owen Anderson
654d5440a4 Add a subtarget hook for reporting the misprediction penalty. Use this to provide more precise 
cost modeling for if-conversion.  Now if only we had a way to estimate the misprediction probability.

Adjsut CodeGen/ARM/ifcvt10.ll.  The pipeline on Cortex-A8 is long enough that it is still profitable
to predicate an ldm, but the shorter pipeline on Cortex-A9 makes it unprofitable.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114995 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-28 21:57:50 +00:00
Eric Christopher
fd60980eb2 Integer materialization needed the same thinko change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114994 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-28 21:55:34 +00:00
Nick Lewycky
a6136b7156 Resolve this GCC warning: 
ARMTargetMachine.cpp:53: error: control reaches end of non-void function


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114992 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-28 21:40:26 +00:00
Anton Korobeynikov
4f922f2cca User proper libcall names & condcodes while compiling for ARM EABI. 
Patch by Evzen Muller!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114991 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-28 21:39:26 +00:00
Owen Anderson
b20b85168c Part one of switching to using a more sane heuristic for determining if-conversion profitability. 
Rather than having arbitrary cutoffs, actually try to cost model the conversion.

For now, the constants are tuned to more or less match our existing behavior, but these will be
changed to reflect realistic values as this work proceeds.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114973 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-28 18:32:13 +00:00
Jim Grosbach
2d0f53bd63 Factor out dbg_value comment printing and teach MC asm printing to use it. 
This should make the arm-linux self-host buildbot happy again.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114964 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-28 17:05:56 +00:00
Oscar Fuentes
c577c271b1 Use the canonical library name for library PIC16Passes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114953 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-28 14:24:47 +00:00
Oscar Fuentes
4dbb2dbf76 Added library LLVMPIC16passes to CMake build. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114952 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-28 14:02:45 +00:00
Oscar Fuentes
38e1390c29 Add ARM Disassembler to the CMake build. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114949 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-28 11:48:19 +00:00
Che-Liang Chiou
acf1d482bf Remove trailing spaces of MipsMachineFunction.h 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114948 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-28 10:06:53 +00:00
Che-Liang Chiou
36919ac8a5 Remove trailing spaces of MipsTargetObjectFile.cpp 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114947 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-28 09:55:24 +00:00
Eric Christopher
a99c3e9acd 80-col fixups. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114943 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-28 04:18:29 +00:00
Bob Wilson
02aba73a9e Add a command line option "-arm-strict-align" to disallow unaligned memory 
accesses for ARM targets that would otherwise allow it.  Radar 8465431.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114941 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-28 04:09:35 +00:00
Eric Christopher
7ed8ec94d9 Rework builtin handling and call setup. The builtin handling 
now takes a libcall operand, sets up the arguments correctly and
handles stack adjustments.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114934 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-28 01:21:42 +00:00
Eric Christopher
5371cabfc2 Fix typo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114931 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-28 00:35:33 +00:00
Eric Christopher
f5732c4ee5 Fix fp constant loads to have a destination register. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114930 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-28 00:35:09 +00:00
Jim Grosbach
385cc5eede Enable the MC-ized ARM asm printer. Passing all local tests, so it's time to 
enable it for real. Leaving the CL option in place to it's easy to disable it
again if (when) testers find something I've missed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114915 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-27 22:28:11 +00:00
Jim Grosbach
5acb3de8b7 ARM-mode eh.sjlj.longjmp MC lowering 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114896 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-27 21:47:04 +00:00
Jim Grosbach
376ce97bac Enable the MC-ized ARM asm printer. Passing all local tests, so it's time to 
enable it for real. Leaving the CL option in place to it's easy to disable it
again if (when) testers find something I've missed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114892 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-27 21:28:44 +00:00
Daniel Dunbar
3b9569e70d Hard to imagine there are still people using inferior compilers. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114862 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-27 20:12:58 +00:00
Rafael Espindola
fd9493d74e Odd additional stub framework for the ARM MC ELF emission. 
llc now recognizes the "intent" to support MC/obj emission for ARM, but
given that they are all stubs, it asserts on --filetype=obj --march=arm

Patch by Jason Kim.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114856 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-27 18:31:37 +00:00
Dale Johannesen
a8bd1ff8c5 MMX parameters aren't handled here yet. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114844 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-27 17:29:47 +00:00
Chris Lattner
2956462742 yet more aliases. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114822 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-27 07:24:57 +00:00
Chris Lattner
b1162fc05e add a couple more aliases, rdar://8456378 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114821 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-27 07:21:41 +00:00
Chris Lattner
df967d6137 fix rdar://8470918 - llvm-mc can't assemble smovl 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114819 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-27 07:11:53 +00:00
Chris Lattner
cb296ec0b6 Fix rdar://8468087 - llvm-mc commutes fmul (and friend) operands. 
My previous fix for rdar://8456371 should only apply to fmulp/faddp,
not to fmul/fadd.  Instruction set orthogonality is overrated or 
something.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114818 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-27 07:08:21 +00:00
Chris Lattner
8048ebe91d the latest assembler that runs on powerpc 10.4 machines doesn't 
support aligned comm.  Detect when compiling for 10.4 and don't
emit an alignment for comm.  THis will hopefully fix PR8198.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114817 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-27 06:44:54 +00:00
Chris Lattner
80945784f9 improve indentation 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114815 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-27 06:34:01 +00:00
Eric Christopher
1127c720ed Insert missing coherency in comment. Add a quick check for hardware 
divide support also.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114813 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-27 06:08:12 +00:00
Eric Christopher
43b62beb4c Mass rename for Jim. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114812 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-27 06:02:23 +00:00
Eric Christopher
722d315ac9 This code should never fire on non-darwin subtargets. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114811 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-27 06:01:51 +00:00
Chris Lattner
fd8fddd830 implement support for 'clr' alias. This is part of rdar://8416805, 
but balrog was wanting it on irc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114809 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-27 04:23:03 +00:00
Che-Liang Chiou
f9930da2ef Add ret instruction to PTX backend 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114788 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-25 07:46:17 +00:00
Rafael Espindola
73ffea47d2 Move ELF to HasReliableSymbolDifference=true. Also take the opportunity to put 
symbols defined in merge sections in independent atoms.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114786 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-25 05:42:19 +00:00
Evan Cheng
5981fc6788 Fix IIC_iEXTAr itinerary class of Cortex-A9. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114784 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-25 01:09:28 +00:00
Evan Cheng
27fdcd1c95 Remove a unused instruction itinerary class. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114782 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-25 01:06:02 +00:00
Evan Cheng
576a3968a2 Fix zero and sign extension instructions scheduling itineraries. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114780 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-25 00:49:35 +00:00
Evan Cheng
bd30ce4311 More pseudo instruction scheduling itinerary fixes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114768 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-24 22:41:41 +00:00
Evan Cheng
5be3922321 Fix scheduling itinerary for pseudo mov immediate instructions which expand into two real instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114766 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-24 22:03:46 +00:00
Jim Grosbach
433a5785cc Add ARM explicit MCInst lowering for the Thumb eh.sjlj.setjmp sequence. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114758 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-24 20:47:58 +00:00
Evan Cheng
fff606d7b2 Enable code placement optimization pass for ARM. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114746 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-24 19:07:23 +00:00
Dale Johannesen
c451051157 We can't return SSE/MMX vectors if SSE is disabled. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114745 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-24 19:05:48 +00:00
Evan Cheng
de0e11c8f3 Fix a potential null dereference bug. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114723 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-24 05:18:35 +00:00
Owen Anderson
f523e476c2 Revert r114703 and r114702, removing the isConditionalMove flag from instructions. After further 
reflection, this isn't going to achieve the purpose I intended it for.  Back to the drawing board!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114710 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-23 23:45:25 +00:00
Bob Wilson
2a6e616142 Set alignment operand for NEON VST instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114709 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-23 23:42:37 +00:00
Jim Grosbach
453900814e ARM-mode eh.sjlj.setjmp pseudo MC-inst lowering expansion 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114707 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-23 23:33:56 +00:00
Jim Grosbach
b327e13740 #+4 --> #4 for consistency with other asm output 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114706 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-23 23:32:38 +00:00
Jim Grosbach
45d6c1777c Fix formatting of output .s code 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114705 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-23 23:03:26 +00:00