Commit Graph

8 Commits

Author SHA1 Message Date
Andrea Di Biagio
8887371782 [X86] Teach the backend how to lower vector shift left into multiply rather than scalarizing it.
Instead of expanding a packed shift into a sequence of scalar shifts,
the backend now tries (when possible) to convert the vector shift into a
vector multiply.

Before this change, a shift of a MVT::v8i16 vector by a
build_vector of constants was always scalarized into a long sequence of "vector
extracts + scalar shifts + vector insert".
With this change, if there is SSE2 support, we emit a single vector multiply.

This change also affects SSE4.1, AVX, AVX2 shifts:
 - A shift of a MVT::v4i32 vector by a build_vector of non uniform constants
is now lowered when possible into a single SSE4.1 vector multiply.
 - Packed v16i16 shift left by constant build_vector are now expanded when
possible into a single AVX2 vpmullw.
This change also improves the lowering of AVX512f vector shifts.

Added test CodeGen/X86/vec_shift6.ll with some code examples that are affected
by this change.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201271 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-12 23:42:28 +00:00
Elena Demikhovsky
87070fe107 Optimized integer vector multiplication operation by replacing it with shift/xor/sub when it is possible. Fixed a bug in SDIV, where the const operand is not a splat constant vector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184931 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-26 10:55:03 +00:00
Benjamin Kramer
02c2ecf9f1 X86: Fold EXTRACT_SUBVECTORs of a BUILD_VECTOR into a smaller BUILD_VECTOR.
That can usually be lowered efficiently and is common in sandybridge code.
It would be nice to do this in DAGCombiner but we can't insert arbitrary
BUILD_VECTORs this late.

Fixes PR15462.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176634 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-07 18:48:40 +00:00
Benjamin Kramer
a220aeb58f X86: Open up some opportunities for constant folding by postponing shift lowering.
Fixes PR15141.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174327 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-04 15:19:33 +00:00
Craig Topper
a124f94952 Make LowerSIGN_EXTEND_INREG split 256-bit vectors when AVX1 is enabled and use AVX2 shifts when AVX2 is enabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145022 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-21 01:12:36 +00:00
Craig Topper
7be5dfd1a1 Add more AVX2 shift lowering support. Move AVX2 variable shift to use patterns instead of custom lowering code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144457 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-12 09:58:49 +00:00
Bruno Cardoso Lopes
0dd80b0d69 Fix PR10688. Add support for spliting 256-bit vector shifts when the
shift amount is variable

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137885 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-17 22:12:20 +00:00
Bruno Cardoso Lopes
328a9d4a0f Add support for several vector shifts operations while in AVX mode. Fix PR10581
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137067 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-08 21:31:08 +00:00