Commit Graph

87 Commits

Author SHA1 Message Date
Andrew Trick
fcfcdbc86a VirtRegRewriter assertion fix.
Apparently it's ok for multiple operands to "kill" the same register.
Fixes PR9237.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126190 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-22 06:52:56 +00:00
Evan Cheng
e32effb02f Remove a duplicated check.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125625 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-16 00:37:02 +00:00
Andrew Trick
5d7ab8503b VirtRegRewriter fix: update kill flags, which are used by the scavenger.
rdar://problem/8893967: JM/lencod miscompile at -arch armv7 -mthumb -O3

Added ResurrectKill to remove kill flags after we decide to reused a
physical register. And (hopefully) ensure that we call it in all the
right places.

Sorry, I'm not checking in a unit test given that it's a miscompile I
can't reproduce easily with a toy example. Failures in the rewriter
depend on a series of heuristic decisions maked during one of the many
upstream phases in codegen. This case would require coercing regalloc
to generate a couple of rematerialzations in a way that causes the
scavenger to reuse the same register at just the wrong point.

The general way to test this is to implement kill flags
verification. Then we could have a simple, robust compile-only unit
test. That would be worth doing if the whole pass was not about to
disappear. At this point we focus verification work on the next
generation of regalloc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124442 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-27 21:26:43 +00:00
Jakob Stoklund Olesen
ee547095bb Teach VirtRegRewriter to update slot indexes when erasing instructions.
It was leaving dangling pointers in the slot index maps.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123334 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-12 22:28:51 +00:00
Jakob Stoklund Olesen
7fd747ba24 Annotate VirtRegRewriter debug output with slot indexes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123333 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-12 22:28:48 +00:00
Evan Cheng
c36b7069b4 Do not model all INLINEASM instructions as having unmodelled side effects.
Instead encode llvm IR level property "HasSideEffects" in an operand (shared
with IsAlignStack). Added MachineInstrs::hasUnmodeledSideEffects() to check
the operand when the instruction is an INLINEASM.

This allows memory instructions to be moved around INLINEASM instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123044 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-07 23:50:32 +00:00
Evan Cheng
30a343aeed DBG_VALUE does not have any side effects; it also makes no sense to mark it cheap as a copy.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123031 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-07 21:08:26 +00:00
Benjamin Kramer
f788854d20 Prune includes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118342 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-06 11:45:59 +00:00
Jakob Stoklund Olesen
40ef4fe82a Properly handle reloading and spilling around partial redefines in
LocalRewriter.

This is a bit of a hack that adds an implicit use operand to model the
read-modify-write nature of a partial redef. Uses and defs are rewritten in
separate passes, and a single operand would never be processed twice.

<rdar://problem/8518892>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116210 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-11 18:10:36 +00:00
Chris Lattner
60cb528246 Per discussion with Sanjiv, remove the PIC16 target from mainline. When/if
it comes back, it will be largely a rewrite, so keeping the old codebase
in tree isn't helping anyone.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116190 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-11 05:44:40 +00:00
Jakob Stoklund Olesen
a32181a57d Extract method ProcessUses from LocalRewriter::RewriteMBB. Both parent and child
are still way too long, but it's a start.

No functional change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116116 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-08 22:14:41 +00:00
Jakob Stoklund Olesen
6b964cd211 Don't add <imp-def> operands during register rewriting.
LiveIntervals already adds <imp-def> operands for super-registers when a subreg
def defines the whole register. Thus, it is not necessary to do it again when
rewriting.

In fact, the super-register imp-defs caused miscompilations because the late
scheduler couldn't see that the super-register was read.

We still add super-reg <imp-use,kill> operands when rewriting virtuals to
physicals.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113299 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-07 22:38:45 +00:00
Jakob Stoklund Olesen
1e3aeefc08 VirtRegRewriter checks for early clobbers before it reuses an available stack
slot.

Teach it to also check for early clobbered aliases, and early clobber operands
following the current operand.

This fixes the miscompilation in PR8044 where EC registers eax and ecx were
being used for inputs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112988 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-03 18:36:56 +00:00
Jakob Stoklund Olesen
a330d4c3ea Avoid using a live std::multimap iterator while editing the map. It looks like
we sometimes compare singular iterators, reported by ENABLE_EXPENSIVE_CHECKS.
This fixes PR7825.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110355 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-05 18:12:19 +00:00
Jim Grosbach
57cb4f8be1 80 column
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109513 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-27 17:38:47 +00:00
Jim Grosbach
ae64eedae2 fix typo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109511 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-27 17:14:29 +00:00
Jakob Stoklund Olesen
af462c4b4f Remove remaining calls to TII::isMoveInstr.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108556 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-16 21:03:55 +00:00
Rafael Espindola
0bfd09201e Convert the last getPhysicalRegisterRegClass in VirtRegRewriter.cpp to
getMinimalPhysRegClass. It was used to produce spills, and it is better to
use the most specific class if possible.

Update getLoadStoreRegOpcode to handle GR32_AD.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108115 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-12 00:52:33 +00:00
Rafael Espindola
db77609991 Convert uses of getPhysicalRegisterRegClass in VirtRegRewriter.cpp.
The first one was used just to call isSafeToMoveRegClassDefs. In
general, using a more specific reg class is better, in practice only
x86 implements that method and the results are always the same.

The second one is in FindFreeRegister and is used to check if a register
is in a register class, a much more direct call to contains is better as
it should cover more cases and is faster.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108093 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-11 16:45:17 +00:00
Jakob Stoklund Olesen
1e1098c6f3 Replace copyRegToReg with COPY everywhere in lib/CodeGen except for FastISel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108062 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-10 22:42:59 +00:00
Jakob Stoklund Olesen
e05442d508 Change TII::foldMemoryOperand API to require the machine instruction to be
inserted in a MBB, and return an already inserted MI.

This target API change is necessary to allow foldMemoryOperand to call
storeToStackSlot and loadFromStackSlot when folding a COPY to a stack slot
reference in a target independent way.

The foldMemoryOperandImpl hook is going to change in the same way, but I'll wait
until COPY folding is actually implemented. Most targets only fold copies and
won't need to specialize this hook at all.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107991 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 17:29:08 +00:00
Jakob Stoklund Olesen
1769cccfc8 Handle COPY in VirtRegRewriter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107949 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 01:27:19 +00:00
Jakob Stoklund Olesen
0bc25f4040 Convert EXTRACT_SUBREG to COPY when emitting machine instrs.
EXTRACT_SUBREG no longer appears as a machine instruction. Use COPY instead.

Add isCopy() checks in many places using isMoveInstr() and isExtractSubreg().
The isMoveInstr hook will be removed later.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107879 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-08 16:40:22 +00:00
Dale Johannesen
493315922b Cosmetic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106865 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-25 17:41:07 +00:00
Dale Johannesen
969b9fe379 Fix a case where an earlyclobber operand of an asm
is reused as an input.  PR 4118.  Testcase is too big,
as usual with bugs in this area, but there's one in
the PR.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106816 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-25 00:49:43 +00:00
Jakob Stoklund Olesen
9edf7deb37 Slightly change the meaning of the reMaterialize target hook when the original
instruction defines subregisters.

Any existing subreg indices on the original instruction are preserved or
composed with the new subreg index.

Also substitute multiple operands mentioning the original register by using the
new MachineInstr::substituteRegister() function. This is necessary because there
will soon be <imp-def> operands added to non read-modify-write partial
definitions. This instruction:

  %reg1234:foo = FLAP %reg1234<imp-def>

will reMaterialize(%reg3333, bar) like this:

  %reg3333:bar-foo = FLAP %reg333:bar<imp-def>

Finally, replace the TargetRegisterInfo pointer argument with a reference to
indicate that it cannot be NULL.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105358 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-02 22:47:25 +00:00
Jakob Stoklund Olesen
2afb7505c5 Teach VirtRegRewriter to handle spilling in instructions that have multiple
definitions of the virtual register.

This happens when spilling the registers produced by REG_SEQUENCE:

%reg1047:5<def>, %reg1047:6<def>, %reg1047:7<def> = VLD3d8 %reg1033, 0, pred:14, pred:%reg0

The rewriter would spill the register multiple times, dead store elimination
tried to keep up, but ended up cutting the branch it was sitting on.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104321 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-21 16:36:13 +00:00
Evan Cheng
31b9c44cc1 It's not safe eliminate copies where src and dst have different sub-register indices.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103450 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-11 00:20:03 +00:00
Dan Gohman
34dcc6fadc Add a DebugLoc argument to TargetInstrInfo::copyRegToReg, so that it
doesn't have to guess.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103194 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-06 20:33:48 +00:00
Evan Cheng
746ad69e08 Add argument TargetRegisterInfo to loadRegFromStackSlot and storeRegToStackSlot.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103193 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-06 19:06:44 +00:00
Evan Cheng
bd6cb4ba1f Remove DBG_VALUE which reference dead stack slots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102654 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-29 18:51:00 +00:00
John McCall
795ee9dd1e Fix a number of clang -Wsign-compare warnings that didn't have an obvious
solution.  The only reason these don't fire with gcc-4.2 is that gcc turns off
part of -Wsign-compare in C++ on accident.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100581 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-06 23:35:53 +00:00
Evan Cheng
98116f99b6 Code clean up. Move includes from VirtRegRewriter.h to VirtRegRewriter.cpp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100532 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-06 17:19:55 +00:00
Evan Cheng
28a1e48690 Avoid being influenced by the presence of dbg_value instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99879 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-30 05:49:07 +00:00
Dale Johannesen
4d12d3b70f Debug info shouldn't affect kills.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99637 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-26 19:21:26 +00:00
Jakob Stoklund Olesen
56698803d9 Extract methods from LocalRewriter::RewriteMBB bringing it down to 666 lines.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98295 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-11 23:04:34 +00:00
Jakob Stoklund Olesen
2cb4202f07 VirtRegRewriter spring cleaning. No functional change.
Move methods out of line and M-x whitespace-cleanup.
Promote common method arguments to member variables.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98207 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-11 00:11:33 +00:00
Duncan Sands
18619b2aeb Uniformize the way these options are printed. Requested by
Russell Wallace.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96580 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-18 14:37:52 +00:00
Jakob Stoklund Olesen
d135f14f61 Fix PR6283.
When coalescing with a physreg, remember to add imp-def and imp-kill when
dealing with sub-registers.

Also fix a related bug in VirtRegRewriter where substitutePhysReg may
reallocate the operand list on an instruction and invalidate the reg_iterator.
This can happen when a register is mentioned twice on the same instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96072 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-13 02:06:10 +00:00
Chris Lattner
45282aedb9 fix a layering violation: VirtRegRewriter.cpp shouldn't use AsmPrinter.h.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95748 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-10 01:23:18 +00:00
Chris Lattner
3143e90ca8 fix missing #includes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95745 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-10 01:17:36 +00:00
Chris Lattner
518bb53485 move target-independent opcodes out of TargetInstrInfo
into TargetOpcodes.h.  #include the new TargetOpcodes.h
into MachineInstr.  Add new inline accessors (like isPHI())
to MachineInstr, and start using them throughout the 
codebase.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95687 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-09 19:54:29 +00:00
Jakob Stoklund Olesen
8efadf94b5 Add <imp-def> and <imp-kill> operands when replacing virtual sub-register defs and kills.
An instruction like this:

  %reg1097:1<def> = VMOVSR %R3<kill>, 14, %reg0

Must be replaced with this when substituting physical registers:

  %S0<def> = VMOVSR %R3<kill>, 14, %reg0, %D0<imp-def>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92812 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-06 00:29:28 +00:00
David Greene
0ee5218cb2 Change errs() to dbgs().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92590 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-05 01:25:52 +00:00
Chris Lattner
7896c9f436 improve portability to avoid conflicting with std::next in c++'0x.
Patch by Howard Hinnant!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90365 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-03 00:50:42 +00:00
Jakob Stoklund Olesen
324da7647c Add MachineBasicBlock::getName, and use it in place of getBasicBlock()->getName.
Fix debug code that assumes getBasicBlock never returns NULL.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89428 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-20 01:17:03 +00:00
Lang Hames
38283e23df Fixed the in-place spiller and trivial rewriter, which had been broken by the recent SlotIndexes work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89238 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-18 20:31:20 +00:00
Evan Cheng
fae3e92345 Added getSubRegIndex(A,B) that returns subreg index of A to B. Use it to replace broken code in VirtRegRewriter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88753 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-14 03:42:17 +00:00
Evan Cheng
d57cdd5683 - Change TargetInstrInfo::reMaterialize to pass in TargetRegisterInfo.
- If destination is a physical register and it has a subreg index, use the
  sub-register instead.
This fixes PR5423.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88745 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-14 02:55:43 +00:00
Evan Cheng
8fdd84cfa7 Fix PR5412: Fix an inverted check and another missing sub-register check.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88738 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-14 02:09:09 +00:00