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Author SHA1 Message Date
Duncan Sands
8246adc1f0 Rename "Release" builds as "Release+Asserts"; rename "Release-Asserts" 
builds to "Release".  The default build is unchanged (optimization on,
assertions on), however it is now called Release+Asserts.  The intent
is that future LLVM releases released via llvm.org will be Release builds
in the new sense, i.e. will have assertions disabled (currently they have
assertions enabled, for a more than 20% slowdown).  This will bring them
in line with MacOS releases, which ship with assertions disabled.  It also
means that "Release" now means the same things in make and cmake builds:
cmake already disables assertions for "Release" builds AFAICS.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107758 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-07 07:48:00 +00:00
Bruno Cardoso Lopes
4f6bdf9042 Add AVX SSE4.2 instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107752 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-07 03:39:29 +00:00
Bruno Cardoso Lopes
332fce49e3 Use only one multiclass to pinsrq instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107750 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-07 01:43:01 +00:00
Bruno Cardoso Lopes
5e9fa98523 Now that almost all SSE4.1 AVX instructions are added, move code around to more appropriate sections. No functionality changes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107749 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-07 01:33:38 +00:00
Bruno Cardoso Lopes
09df2ae0d0 Add AVX SSE4.1 insertps, ptest and movntdqa instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107747 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-07 01:14:56 +00:00
Bruno Cardoso Lopes
3c14822312 Add AVX SSE4.1 extractps and pinsr instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107746 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-07 01:01:13 +00:00
Jakob Stoklund Olesen
4b76ffc1ff Revert "Remove references to INSERT_SUBREG after de-SSA" r107725. 
Buildbot breakage.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107744 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-07 00:32:25 +00:00
Bob Wilson
78dfbc380d Also use REG_SEQUENCE for VTBX instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107743 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-07 00:08:54 +00:00
Jim Grosbach
e97f968a69 Mark eh.sjlj.set/longjmp custom lowerings as Darwin-only since that's where 
they've been tested to work.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107742 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-07 00:07:57 +00:00
Bruno Cardoso Lopes
4fd32db6a6 Add AVX SSE4.1 Extract Integer instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107740 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-07 00:07:24 +00:00
Jim Grosbach
c66e150b2c By default, the eh.sjlj.setjmp/longjmp intrinsics should just do nothing rather 
than assuming a target will custom lower them. Targets which do so should
exlicitly mark them as having custom lowerings. PR7454.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107734 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-06 23:44:52 +00:00
Jakob Stoklund Olesen
d3b376b448 Remove references to INSERT_SUBREG after de-SSA 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107732 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-06 23:40:35 +00:00
Bob Wilson
d491d6ecd2 Use REG_SEQUENCE nodes to make the table registers for VTBL instructions be 
allocated to consecutive registers.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107730 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-06 23:36:25 +00:00
Dale Johannesen
e2b448c208 Accept RIP-relative symbols with 'i' constraint, and 
print the (%rip) only if the 'a' modifier is present.
PR 7528.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107727 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-06 23:27:00 +00:00
Jakob Stoklund Olesen
ed2185e171 Convert INSERT_SUBREG to COPY in TwoAddressInstructionPass. 
INSERT_SUBREG will now only appear in SSA machine instructions.

Fix the handling of partial redefs in ProcessImplicitDefs. This is now relevant
since partial redef COPY instructions appear.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107726 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-06 23:26:25 +00:00
Jakob Stoklund Olesen
fca3a25fed Track defs for all aliases in NEONMoveFix. 
This means that an instruction defining an S register will affect the domain of
the parent D register.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107725 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-06 23:26:23 +00:00
Bruno Cardoso Lopes
ee94e8297e Add the rest of AVX SSE4.1 packed move with sign/zero extend instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107723 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-06 23:15:17 +00:00
Dale Johannesen
e6fd5ad6f4 Make test not hang waiting for input. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107721 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-06 23:06:58 +00:00
Bruno Cardoso Lopes
36869b69b0 Add part of AVX SSE4.1 packed move with sign/zero extend instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107720 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-06 23:01:41 +00:00
Bruno Cardoso Lopes
0106680a2c Fix comment from previous patch 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107717 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-06 22:38:32 +00:00
Bruno Cardoso Lopes
07de40629f Add AVX vblendvpd, vblendvps and vpblendvb instructions 
Update VEX encoding to support those new instructions


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107715 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-06 22:36:24 +00:00
Dan Gohman
c9af33c685 CanLowerReturn doesn't need a SelectionDAG; it just needs an LLVMContext. 
SelectBasicBlock doesn't needs its BasicBlock argument.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107712 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-06 22:19:37 +00:00
Devang Patel
0d881dabc1 Propagate debug loc. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107710 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-06 22:08:15 +00:00
Bob Wilson
f967ca0eaf Represent NEON load/store alignments in bytes, not bits. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107701 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-06 21:26:18 +00:00
Jakob Stoklund Olesen
5ee99923c1 One more case assuming that subregs have live ranges. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107700 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-06 21:13:03 +00:00
John McCall
191d4ee342 Closing tags start with slashes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107699 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-06 21:07:14 +00:00
Jakob Stoklund Olesen
813eedd207 Fix buildbot breakage where a def is missing. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107698 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-06 21:06:39 +00:00
Devang Patel
6db2389d69 Add fixme. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107697 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-06 21:05:17 +00:00
Chris Lattner
211244aa52 minor typo 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107696 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-06 20:51:35 +00:00
Jakob Stoklund Olesen
9c2e7ca351 Be more forgiving when calculating alias interference for physreg coalescing. 
It is OK for an alias live range to overlap if there is a copy to or from the
physical register. CoalescerPair can work out if the copy is coalescable
independently of the alias.

This means that we can join with the actual destination interval instead of
using the getOrigDstReg() hack. It is no longer necessary to merge clobber
ranges into subregisters.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107695 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-06 20:31:51 +00:00
Dan Gohman
14152b480d Reapply r107655 with fixes; insert the pseudo instruction into 
the block before calling the expansion hook. And don't
put EFLAGS in a mbb's live-in list twice.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107691 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-06 20:24:04 +00:00
Matt Fleming
004c82ad7c Add X86_64 ELF relocation values and ELF64 relocation classes. 
Patch from Roman Divacky.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107688 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-06 18:44:02 +00:00
Matt Fleming
e07cc5dab1 Add some more ELF OSABI values as found in the System V Application 
Binary Interface specification.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107685 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-06 18:36:57 +00:00
Eric Christopher
894339e19f Fix to 80-col. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107684 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-06 18:35:20 +00:00
John McCall
b271d8679d Provide IRBuilder conveniences for creating integer constants at common widths, 
and give a more precise return type for some of the type-creation methods.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107683 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-06 18:34:49 +00:00
Nick Lewycky
76ec37a138 Alphabetize the list of function parameters. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107680 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-06 18:24:09 +00:00
Devang Patel
be35be614c Fix PR7545 crash. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107678 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-06 18:18:32 +00:00
John McCall
5ed9eee61a Provide an abstraction to save and restore the current insertion point of 
an IRBuilder.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107677 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-06 18:07:52 +00:00
Rafael Espindola
a5e82a5748 Don't create neon moves in CopyRegToReg. NEONMoveFixPass will do the conversion 
if profitable.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107673 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-06 16:24:34 +00:00
Chris Lattner
f8bd392dce tighten up this code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107670 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-06 15:59:27 +00:00
Duncan Sands
5c60386dbc Bring the list of passes and their descriptions up to date. 
Patch by Kenneth Hoste.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107669 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-06 15:52:15 +00:00
Dan Gohman
258c58cc62 Revert r107655. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107668 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-06 15:49:48 +00:00
Gabor Greif
e9e1215d94 second round of low-level interface squeeze-out: 
making all of CallInst's low-level operand accessors
private

If you get compile errors I strongly urge you to
update your code.


I tried to write the necessary clues into the
header where the compiler may point to, but no
guarantees. It works for my GCC.

You have several options to update your code:

- you can use the v2.8 ArgOperand accessors
- you can go via a temporary CallSite
- you can upcast to, say, User and call its
  low-level accessors if your code is definitely
  operand-order agnostic.

If you run into serious problems, please
comment in below thread (and back out this
revision only if absolutely necessary):

<http://groups.google.com/group/llvm-dev/browse_thread/thread/64650cf343b28271>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107667 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-06 15:44:11 +00:00
Dan Gohman
aa8c19405a Add versions of OutputArgReg, AnalyzeReturn, and AnalyzeCallOperands 
which do not depend on SelectionDAG.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107666 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-06 15:39:54 +00:00
Dan Gohman
802e28a8d7 Add a new CCValAssign LocInfo value, and a comment explaining what it 
should be used for.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107661 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-06 15:35:06 +00:00
Dan Gohman
c2af869d62 Make getMinimalPhysRegClass' comment mention what makes it different 
from getPhysicalRegisterRegClass.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107660 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-06 15:31:55 +00:00
Dan Gohman
ff70fe40aa Note the relationship between C99 restrict and LLVM noalias, and 
clarify a few other things.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107659 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-06 15:26:33 +00:00
Anton Korobeynikov
36335be3b9 Fix a major regression on COFF targets introduced by r103267: 'discardable' section means that it is used only during the program load and can be discarded afterwards. 
This way *only* debug sections can be discarded, but not the opposite. Seems like the copy-and-pasto from ELF code, since there it contains the reverse flag ('alloc').

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107658 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-06 15:24:56 +00:00
Dan Gohman
0ce249911b Add some more TODO comments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107657 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-06 15:23:00 +00:00
Dan Gohman
d3b6e41ffb Add a comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107656 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-06 15:21:57 +00:00