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1210 Commits

Author SHA1 Message Date
Daniel Dunbar
192957d376 Revert r75615, which depended on 75610. 
--- Reverse-merging r75615 into '.':
U    lib/Target/XCore/XCoreAsmPrinter.cpp
U    lib/Target/PIC16/PIC16AsmPrinter.cpp
U    lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.cpp
U    lib/Target/MSP430/MSP430AsmPrinter.cpp
U    lib/Target/IA64/AsmPrinter/IA64AsmPrinter.cpp
U    lib/Target/CellSPU/AsmPrinter/SPUAsmPrinter.cpp
U    lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp
U    lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp
U    lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp
U    lib/Target/MSIL/MSILWriter.cpp
U    lib/Target/Sparc/AsmPrinter/SparcAsmPrinter.cpp
U    lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75637 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-14 16:12:13 +00:00
Chris Lattner
b09d2ccc0f Rename getValueName -> getMangledName. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75615 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-14 06:18:50 +00:00
Evan Cheng
f6bc4ae4a1 1. In Thumb mode, select tBx instead of ARM variants. 
2. BX does not "use" the link register, it defines it.
3. Fix a couple more places in thumb td file that still uses pre-UAL syntax.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75585 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-14 01:49:27 +00:00
David Goodwin
c2ffd286af Fix detection of valid BFC immediates. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75576 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-14 00:57:56 +00:00
Bob Wilson
e622087e20 Fix an obvious copy-and-paste error. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75566 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-14 00:23:44 +00:00
Bob Wilson
60206140a1 Revert 75309. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75562 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-14 00:01:42 +00:00
David Goodwin
ea670f1dd8 Fix FP elimination code to work for Thumb-2 addrmode AddrModeT2_so. This fixes SingleSource/Benchmarks/Stanford/Queens (among others). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75513 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-13 21:43:08 +00:00
Bob Wilson
d2559bf3f3 Fix comment typos. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75479 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-13 18:11:36 +00:00
Torok Edwin
29fd056d81 Remove extra \n from LLVM_UNREACHABLE calls. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75416 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-12 07:15:17 +00:00
Torok Edwin
c25e7581b9 assert(0) -> LLVM_UNREACHABLE. 
Make llvm_unreachable take an optional string, thus moving the cerr<< out of
line.
LLVM_UNREACHABLE is now a simple wrapper that makes the message go away for
NDEBUG builds.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75379 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-11 20:10:48 +00:00
Evan Cheng
ed338e80f9 Don't put IT instruction before conditional branches. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75361 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-11 07:26:20 +00:00
Evan Cheng
2f297df02e Smarter isel of ldrsb / ldrsh. Only make use of these when [r,r] address is feasible. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75360 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-11 07:08:13 +00:00
Evan Cheng
446c428bf3 Major changes to Thumb (not Thumb2). Many 16-bit instructions either modifies CPSR when they are outside the IT blocks, or they can predicated when in Thumb2. Move the implicit def of CPSR to an optional def which defaults CPSR. This allows the 's' bit to be toggled dynamically. 
A side-effect of this change is asm printer is now using unified assembly. There are some minor clean ups and fixes as well.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75359 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-11 06:43:01 +00:00
Evan Cheng
dd6f63209c 80 col violation. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75358 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-11 06:37:27 +00:00
Bob Wilson
1e44ed88eb Add superclasses of ARM Neon quad registers. The Q2PR class contains pairs of 
quad registers and the Q4PR class holds sets of 4 quad registers.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75309 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-10 23:09:06 +00:00
David Goodwin
3ca524e336 Predicate VFP instructions on HasVFP2 instead of IsARM. This allows VFP instructions with thumb-2. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75254 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-10 17:03:29 +00:00
David Goodwin
b1beca635f t2LDM_RET does not fall-through. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75250 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-10 15:33:46 +00:00
Duncan Sands
179bef3636 Add Thumb2ITBlockPass.cpp to CMakeLists.txt, fixing 
the cmake build.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75246 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-10 08:31:50 +00:00
Evan Cheng
b6264decdb More info about Thumb1 predication support. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75220 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-10 02:10:17 +00:00
Evan Cheng
892837abf3 We don't need separate thumb1 instructions tADDSi3 etc. for addc and subc. The "normal" version always modify condition register CPSR so we should just use def : pat to match to the same instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75219 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-10 02:09:04 +00:00
Evan Cheng
06e16587eb Add a thumb2 pass to insert IT blocks. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75218 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-10 01:54:42 +00:00
Evan Cheng
ab33150445 Move isPredicated from .cpp to .h 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75217 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-10 01:38:27 +00:00
Evan Cheng
b5619f42f4 80 col violation. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75212 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-10 00:45:16 +00:00
Evan Cheng
9c06178e35 Remove a bogus assertion. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75206 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-10 00:23:48 +00:00
Bob Wilson
97354f5181 Replace TM.getRegisterInfo() calls by TRI instance variable. 
Use getAsmName() method instead of accessing AsmName field directly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75205 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-10 00:14:05 +00:00
Bob Wilson
9b4b00ad43 Handle 'a' modifier on inline assembly operands. 
This is part of the fix for pr4521.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75201 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-09 23:54:51 +00:00
Evan Cheng
e5564748b7 Added Thumb IT instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75198 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-09 23:43:36 +00:00
Evan Cheng
896fe89f55 Another todo entry. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75192 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-09 23:17:28 +00:00
Evan Cheng
45032f2801 Initial support for load / store multiple opt pass Thumb2 support (post-allocation only). It's kind of there, but not quite. I'll return to this later. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75190 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-09 23:11:34 +00:00
Evan Cheng
c50a1cbf5f Fix ldm / stm unified syntax; add t2LDM_RET. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75188 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-09 22:58:39 +00:00
Evan Cheng
d75223d6c6 LDM_RET should be marked mayLoad. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75187 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-09 22:57:41 +00:00
Evan Cheng
5c874172ac Fix ldrd / strd address mode matching code. It allows for +/- 8 bit offset. Also change the printer to make the scale 4 explicit. 
Note, we are not yet generating these instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75181 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-09 22:21:59 +00:00
Evan Cheng
6dded67b0d Add a Thumb readme entry. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75173 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-09 20:50:52 +00:00
Evan Cheng
cba962dd6b Correct comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75172 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-09 20:40:44 +00:00
David Goodwin
8b98b85c64 Handle Thumb-2 addressing modes during FP elimination. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75158 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-09 18:35:52 +00:00
Owen Anderson
d1474d09cb Thread LLVMContext through MVT and related parts of SDISel. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75153 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-09 17:57:24 +00:00
Evan Cheng
1945b7b5c5 Reorg includes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75115 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-09 06:49:09 +00:00
David Goodwin
f1daf7d8ab Use common code for both ARM and Thumb-2 instruction and register info. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75067 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-08 23:10:31 +00:00
Evan Cheng
dda0f4cb79 - Add some NEON ld / st instruction static encoding. 
- Make bits 25-27 for ldrh, etc. explicitly zero. Previously only the JIT uses the encoding information and it's assuming anything not specified to be zero. Making them explicit so the disassembler is happy.
Patch by Sean Callanan.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75065 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-08 22:51:32 +00:00
Evan Cheng
e7cbe4118b Change how so_imm and t2_so_imm are handled. At instruction selection time, the immediates are no longer encoded in the imm8 + rot format, that are left as it is. The encoding is now done in ams printing and code emission time instead. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75048 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-08 21:03:57 +00:00
Torok Edwin
3046470919 Missed an exit during the conversion. 
Will convert assert(0) that don't have abort() to LLVM_UNREACHABLE in a later
commit.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75045 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-08 20:55:50 +00:00
Torok Edwin
dac237e182 Implement changes from Chris's feedback. 
Finish converting lib/Target.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75043 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-08 20:53:28 +00:00
Bob Wilson
2ed334694f Implement NEON vst1 instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75037 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-08 20:32:02 +00:00
David Goodwin
77521f5232 Generalize opcode selection in ARMBaseRegisterInfo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75036 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-08 20:28:28 +00:00
Xerxes Ranby
cecbc964e1 Fix cmake build. 
Added ARMBaseRegisterInfo.cpp to lib/Target/ARM/CMakeLists.txt


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75035 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-08 20:13:41 +00:00
David Goodwin
db5a71a8e0 Push methods into base class in preparation for sharing. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75020 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-08 18:31:39 +00:00
Bob Wilson
205a5ca6cf Implement NEON vld1 instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75019 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-08 18:11:30 +00:00
Torok Edwin
ab7c09b6b6 Start converting to new error handling API. 
cerr+abort -> llvm_report_error
assert(0)+abort -> LLVM_UNREACHABLE (assert(0)+llvm_unreachable-> abort() included)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75018 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-08 18:01:40 +00:00
David Goodwin
c140c4803d Start breaking out common base functionality for register info. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75016 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-08 17:28:55 +00:00
David Goodwin
334c26473b Checkpoint Thumb2 Instr info work. Generalized base code so that it can be shared between ARM and Thumb2. Not yet activated because register information must be generalized first. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75010 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-08 16:09:28 +00:00
Nick Lewycky
7f6aa2b162 Remove the vicmp and vfcmp instructions. Because we never had a release with 
these instructions, no autoupgrade or backwards compatibility support is
provided.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74991 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-08 03:04:38 +00:00
Evan Cheng
34a0fa362d Add a Thumb2 instruction flag to that indicates whether the instruction can be transformed to 16-bit variant. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74988 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-08 01:46:35 +00:00
Evan Cheng
c9a4153eef Add a todo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74976 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-08 00:05:05 +00:00
Evan Cheng
0fc0ade095 Also statically set bit 25 for BR_JT instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74974 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-07 23:45:10 +00:00
Evan Cheng
bc8a94540a Statically encode bit 25 to indicate immediate form of data processing instructions. Patch by Sean Callanan. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74972 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-07 23:40:25 +00:00
Evan Cheng
e253c951b3 Add Thumb2 movcc instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74946 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-07 20:39:03 +00:00
Evan Cheng
1c83eb33c3 Add BX and BXr9 encodings. Patch by Sean Callanan. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74938 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-07 19:16:24 +00:00
Evan Cheng
40289b041a Add Thumb2 pkhbt / pkhtb. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74895 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-07 05:35:52 +00:00
Evan Cheng
5b9fcd1c8e Add some more Thumb2 multiplication instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74889 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-07 01:17:28 +00:00
Evan Cheng
58541fd627 80 col violation. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74888 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-07 01:16:41 +00:00
Evan Cheng
3147fb2cff isThumb2 really should mean thumb2 only, not thumb2+. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74871 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-06 22:29:14 +00:00
Evan Cheng
36a0aebac2 Add bfc to armv6t2. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74868 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-06 22:23:46 +00:00
Evan Cheng
edcbada3d0 Added ARM::mls for armv6t2. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74866 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-06 22:05:45 +00:00
Bruno Cardoso Lopes
ac57e6e498 Add the Object Code Emitter class. Original patch by Aaron Gray, I did some 
cleanup, removed some #includes and moved Object Code Emitter out-of-line.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74813 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-06 05:09:34 +00:00
Tilmann Scheller
6b61cd185e Add NumFixedArgs attribute to CallSDNode which indicates the number of fixed arguments in a vararg call. 
With the SVR4 ABI on PowerPC, vector arguments for vararg calls are passed differently depending on whether they are a fixed or a variable argument. Variable vector arguments always go into memory, fixed vector arguments are put 
into vector registers. If there are no free vector registers available, fixed vector arguments are put on the stack.

The NumFixedArgs attribute allows to decide for an argument in a vararg call whether it belongs to the fixed or variable portion of the parameter list.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74764 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-03 06:44:53 +00:00
Evan Cheng
d27c9fc403 Add thumb2 sign / zero extend with rotate instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74755 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-03 01:43:10 +00:00
Evan Cheng
2889ccea62 Add Thumb2 load / store multiple instructions. Not used yet. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74749 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-03 00:18:36 +00:00
Evan Cheng
78236f8c8a t2LDR_PRE etc are loads. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74741 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-03 00:08:19 +00:00
Evan Cheng
6d94f11196 Added indexed stores. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74740 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-03 00:06:39 +00:00
Evan Cheng
4fbb9960ad Sign extending pre/post indexed loads. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74736 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-02 23:16:11 +00:00
David Goodwin
b50ea5c48f Checkpoint refactoring of ThumbInstrInfo and ThumbRegisterInfo into Thumb1InstrInfo, Thumb2InstrInfo, Thumb1RegisterInfo and Thumb2RegisterInfo. Move methods from ARMInstrInfo to ARMBaseInstrInfo to prepare for sharing with Thumb2. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74731 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-02 22:18:33 +00:00
Douglas Gregor
033080cf6a CMake build fixes, from Xerxes Ranby 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74720 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-02 18:53:52 +00:00
Evan Cheng
e88d5cee9d Thumb2 pre/post indexed loads. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74696 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-02 07:28:31 +00:00
Evan Cheng
0412957764 80 col violation. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74693 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-02 06:44:30 +00:00
Evan Cheng
d770d9e7d1 Change the meaning of predicate hasThumb2 to mean thumb2 ISA is available, not that it's in thumb mode and thumb2 is available. Added isThumb2 predicate to replace the old predicate. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74692 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-02 06:38:40 +00:00
Evan Cheng
31926a78e3 80 col violation. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74683 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-02 01:30:04 +00:00
Evan Cheng
af4550f826 Factor out ARM indexed load matching code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74681 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-02 01:23:32 +00:00
Bob Wilson
8b024a5eb5 Add a new addressing mode for NEON load/store instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74658 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-01 23:16:05 +00:00
Bob Wilson
b864e89fe4 Fix a comment typo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74650 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-01 21:59:43 +00:00
Bob Wilson
d4d826e170 Fix up a comment: besides the >80col lines, the operation for this 
addressing mode is encoded in the second operand, not the third.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74641 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-01 21:22:45 +00:00
Bill Wendling
b4202b84d7 Update comments to make it clear that the function alignment is the Log2 of the 
bytes and not bytes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74624 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-01 18:50:55 +00:00
Evan Cheng
2578ba26e7 Handle IMPLICIT_DEF with isUndef operand marker, part 2. This patch moves the code to annotate machineoperands to LiveIntervalAnalysis. It also add markers for implicit_def that define physical registers. The rest, is just a lot of details. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74580 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-01 01:59:31 +00:00
Daniel Dunbar
5bcc8bd0c6 Remove unused AsmPrinter OptLevel argument, and propogate. 
- This more or less amounts to a revert of r65379. I'm curious to know what
   happened that caused this variable to become unused.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74579 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-01 01:48:54 +00:00
David Goodwin
d1fa120aee Add PIC load and store patterns for Thumb-2. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74577 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-01 00:01:13 +00:00
David Goodwin
6647cea111 Thumb-2 load and store double description. But nothing yet creates them. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74566 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-30 22:50:01 +00:00
Bill Wendling
20c568f366 Add an "alignment" field to the MachineFunction object. It makes more sense to 
have the alignment be calculated up front, and have the back-ends obey whatever
alignment is decided upon.

This allows for future work that would allow for precise no-op placement and the
like.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74564 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-30 22:38:32 +00:00
David Goodwin
73b8f16b36 Add thumb-2 store word, halfword, and byte. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74555 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-30 22:11:34 +00:00
David Goodwin
c9a59b5960 Improve Thumb-2 jump table support. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74549 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-30 19:50:22 +00:00
David Goodwin
5e47a9a6e4 Add conditional and unconditional thumb-2 branch. Add thumb-2 jump table. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74543 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-30 18:04:13 +00:00
Evan Cheng
f3c21b857b A few more load instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74500 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-30 02:15:48 +00:00
David Goodwin
baeb911d60 Add Thumb-2 support for TEQ amd TST. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74468 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-29 22:49:42 +00:00
David Goodwin
c0309b48b5 Rename ARMcmpNZ to ARMcmpZ and use it to represent comparisons that set only the Z flag (i.e. eq and ne). Make ARMcmpZ commutative. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74423 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-29 15:33:01 +00:00
Duncan Sands
c91e68a0c4 Include the new file ThumbRegisterInfo.cpp to CMakeLists.txt 
to make sure ThumbRegisterInfo.cpp are compiled and linked in.
Patch by Xerxes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74421 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-29 13:11:32 +00:00
Evan Cheng
055b0310f8 Implement Thumb2 ldr. 
After much back and forth, I decided to deviate from ARM design and split LDR into 4 instructions (r + imm12, r + imm8, r + r << imm12, constantpool). The advantage of this is 1) it follows the latest ARM technical manual, and 2) makes it easier to reduce the width of the instruction later. The down side is this creates more inconsistency between the two sub-targets. We should split ARM LDR instruction in a similar fashion later. I've added a README entry for this.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74420 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-29 07:51:04 +00:00
Anton Korobeynikov
55ad1f22b4 Simplify a bit 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74385 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-27 12:59:03 +00:00
Anton Korobeynikov
a98cbc554c ARM refactoring. Step 2: split RegisterInfo 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74384 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-27 12:16:40 +00:00
Douglas Gregor
1b573d8b20 Add ThumbInstrInfo.cpp to the CMake makefiles 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74382 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-27 07:44:59 +00:00
Evan Cheng
9cb9e6778c Renaming for consistency. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74368 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-27 02:26:13 +00:00
David Goodwin
8eba8e0ca3 Remove outdated comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74357 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-26 23:39:02 +00:00
David Goodwin
dcdaebc592 When possible, use "mvn ra, rb" instead of "eor ra, rb, -1" because mvn has a narrow version and eor(i) does not. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74355 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-26 23:13:13 +00:00