14622 Commits

Author SHA1 Message Date
Tom Stellard
f45d11b56b LegalizeDAG: Allow type promotion of scalar loads
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169773 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-10 21:41:58 +00:00
Tom Stellard
8b7f16e971 LegalizeDAG: Allow type promotion for scalar stores
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169772 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-10 21:41:54 +00:00
Eric Christopher
4daaed1c70 Use the somewhat semantic term "split dwarf" it more matches what's
going on and makes a lot of the terminology in comments make more sense.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169758 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-10 19:51:21 +00:00
Eric Christopher
9ec87b3c86 Delete the FissionCU.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169757 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-10 19:51:18 +00:00
Eric Christopher
28bd25a06b Reorder fission variables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169756 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-10 19:51:13 +00:00
Hal Finkel
f21831073c Use GetUnderlyingObjects in misched
misched used GetUnderlyingObject in order to break false load/store
dependencies, and the -enable-aa-sched-mi feature similarly relied on
GetUnderlyingObject in order to ensure it is safe to use the aliasing analysis.
Unfortunately, GetUnderlyingObject does not recurse through phi nodes, and so
(especially due to LSR) all of these mechanisms failed for
induction-variable-dependent loads and stores inside loops.

This change replaces uses of GetUnderlyingObject with GetUnderlyingObjects
(which will recurse through phi and select instructions) in misched.

Andy reviewed, tested and simplified this patch; Thanks!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169744 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-10 18:49:16 +00:00
Craig Topper
48b509c773 Teach DAG combine to handle vector add/sub with vectors of all 0s.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169727 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-10 08:12:29 +00:00
Craig Topper
5a0f372feb Remove extra blank line.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169692 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-09 08:20:52 +00:00
Craig Topper
9472b4fbf9 Teach DAG combine to handle vector logical operations with vectors of all 1s or all 0s. These cases can show up when vectors are split for legalizing. Fix some tests that were dependent on these cases not being combined.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169684 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-08 22:49:19 +00:00
Jakob Stoklund Olesen
fad649a5b1 Add higher-level API for dealing with bundled MachineInstrs.
This is still a work in progress. The purpose is to make bundling and
unbundling operations explicit, and to catch errors where bundles are
broken or created inadvertently.

The old IsInsideBundle flag is replaced by two MI flags: BundledPred
which has the same meaning as IsInsideBundle, and BundledSucc which is
set on instructions that are bundled with a successor. Having two flags
provdes redundancy to detect when a bundle is inadvertently torn by a
splice() or insert(), and it makes it possible to write bundle iterators
that don't need to peek at adjacent instructions.

The new flags can't be manipulated directly (once setIsInsideBundle is
gone). Instead there are MI functions to make and break bundle bonds.

The setIsInsideBundle function will be removed in a future commit. It
should be replaced by bundleWithPred().

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169583 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-07 04:23:29 +00:00
Pedro Artigas
873a1dd7d6 fixed valgrind issues of prior commit, this change applies r169456 changes back to the tree with fixes. on darwin no valgrind issues exist in the tests that used to fail.
original change description:

change MCContext to work on the doInitialization/doFinalization model

reviewed by Evan Cheng <evan.cheng@apple.com>




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169553 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-06 22:12:44 +00:00
Evan Cheng
2766a47310 Replace r169459 with something safer. Rather than having computeMaskedBits to
understand target implementation of any_extend / extload, just generate
zero_extend in place of any_extend for liveouts when the target knows the
zero_extend will be implicit (e.g. ARM ldrb / ldrh) or folded (e.g. x86 movz).

rdar://12771555


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169536 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-06 19:13:27 +00:00
Nadav Rotem
dde785cd70 Fix a bug in the code that merges consecutive stores. Previously we did not
check if loads that happen in between stores alias with the first store in the
chain, only with the second store onwards.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169516 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-06 17:34:13 +00:00
Bill Wendling
6afe478e00 s/getLowerBoundDefault/getDefaultLowerBound/ for consistency. Also put the more natural check first in the if-then statement.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169486 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-06 07:55:19 +00:00
Bill Wendling
222c2fd60d Handle non-default array bounds.
Some languages, e.g. Ada and Pascal, allow you to specify that the array bounds
are different from the default (1 in these cases). If we have a lower bound
that's non-default, then we emit the lower bound. We also calculate the correct
upper bound in those cases.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169484 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-06 07:38:10 +00:00
NAKAMURA Takumi
c7078924f0 Revert r169456, "change MCContext to work on the doInitialization/doFinalization model"
It broke many builders.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169462 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-06 02:00:13 +00:00
Evan Cheng
8a7186dbc2 Let targets provide hooks that compute known zero and ones for any_extend
and extload's. If they are implemented as zero-extend, or implicitly
zero-extend, then this can enable more demanded bits optimizations. e.g.

define void @foo(i16* %ptr, i32 %a) nounwind {
entry:
  %tmp1 = icmp ult i32 %a, 100
  br i1 %tmp1, label %bb1, label %bb2
bb1:
  %tmp2 = load i16* %ptr, align 2
  br label %bb2
bb2:
  %tmp3 = phi i16 [ 0, %entry ], [ %tmp2, %bb1 ]
  %cmp = icmp ult i16 %tmp3, 24
  br i1 %cmp, label %bb3, label %exit
bb3:
  call void @bar() nounwind
  br label %exit
exit:
  ret void
}

This compiles to the followings before:
        push    {lr}
        mov     r2, #0
        cmp     r1, #99
        bhi     LBB0_2
@ BB#1:                                 @ %bb1
        ldrh    r2, [r0]
LBB0_2:                                 @ %bb2
        uxth    r0, r2
        cmp     r0, #23
        bhi     LBB0_4
@ BB#3:                                 @ %bb3
        bl      _bar
LBB0_4:                                 @ %exit
        pop     {lr}
        bx      lr

The uxth is not needed since ldrh implicitly zero-extend the high bits. With
this change it's eliminated.

rdar://12771555


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169459 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-06 01:28:01 +00:00
Pedro Artigas
486a7ad94f change MCContext to work on the doInitialization/doFinalization model
reviewed by Evan Cheng <evan.cheng@apple.com>



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169456 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-06 00:50:55 +00:00
Andrew Trick
22af4bc07b RegPressureTracker::dump(): Remove unnecessary argument.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169443 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-05 23:05:22 +00:00
Andrew Trick
f3329c419b RegisterPressureTracker: fix findUseBetween to handle DebugValue
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169427 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-05 21:37:50 +00:00
Andrew Trick
f54f615386 RegisterPressureTracker: unify virtual registers and physical regunits.
Now that live register units are tracked individually, the code can be simplified.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169426 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-05 21:37:47 +00:00
Andrew Trick
553c42cefc RegisterPresssureTracker: Track live physical register by unit.
This is much simpler to reason about, more efficient, and
fixes some corner cases involving implicit super-register defs.
Fixed rdar://12797931.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169425 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-05 21:37:42 +00:00
Jakob Stoklund Olesen
b47a4f7a0a Remove unused MachineInstr constructors.
A MachineInstr can only ever be constructed by CreateMachineInstr() and
CloneMachineInstr(), and those factories don't use the removed
constructors.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169395 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-05 18:27:39 +00:00
Pedro Artigas
d1abec365a - Added calls to doInitialization/doFinalization to immutable passes
- fixed ordering of calls to doFinalization to be the reverse of the pass run order due to potential dependencies
- fixed machine module info to operate in the doInitialization/doFinalization model, also fixes some FIXMEs

reviewed by Evan Cheng <evan.cheng@apple.com>



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169391 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-05 17:12:22 +00:00
Andrew Trick
17cf535199 Added RegisterPressureTracker::dump() for debugging.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169359 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-05 06:47:08 +00:00
Jakob Stoklund Olesen
f7999fe1cb Speed up the AllocationOrder class a bit.
Allow the central functions to be inlined, and use the argumentless
isHint() function when possible.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169319 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-04 22:25:16 +00:00
David Blaikie
836cfc46b3 Comment change made in r169304 as requested by Eric Christopher.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169315 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-04 22:02:33 +00:00
Bill Wendling
9493dae613 Use the 'count' attribute to calculate the upper bound of an array.
The count attribute is more accurate with regards to the size of an array. It
also obviates the upper bound attribute in the subrange. We can also better
handle an unbound array by setting the count to -1 instead of the lower bound to
1 and upper bound to 0.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169312 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-04 21:34:03 +00:00
David Blaikie
b36c531653 Reapply r160148 (reverted in r163570) fixing spurious breakpoints in modern GDB
This reapplies the fix for PR13303 now with more justification. Based on my
execution of the GDB 7.5 test suite this results in:

expected passes: 16101 -> 20890 (+30%)
unexpected failures: 4826 -> 637 (-77%)

There are 23 checks that used to pass and now fail. They are all in
gdb.reverse. Investigating a few looks like they were accidentally passing
due to extra breakpoints being set by this bug. They're generally due to the
difference in end location between gcc and clang, the test suite is trying to
set breakpoints on the closing '}' that clang doesn't associate with any
instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169304 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-04 21:05:36 +00:00
Chandler Carruth
a1514e24cc Sort includes for all of the .h files under the 'lib' tree. These were
missed in the first pass because the script didn't yet handle include
guards.

Note that the script is now able to handle all of these headers without
manual edits. =]

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169224 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-04 07:12:27 +00:00
Bill Wendling
a7645a3c66 Add a 'count' field to the DWARF subrange.
The count field is necessary because there isn't a difference between the 'lo'
and 'hi' attributes for a one-element array and a zero-element array. When the
count is '0', we know that this is a zero-element array. When it's >=1, then
it's a normal constant sized array. When it's -1, then the array is unbounded.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169218 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-04 06:20:49 +00:00
Jakub Staszak
f94e8c4caf Simplify code. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169198 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-04 01:00:52 +00:00
Manman Ren
69261a6442 Stack Alignment: when creating stack objects in MachineFrameInfo, make sure
the alignment is clamped to TargetFrameLowering.getStackAlignment if the target
does not support stack realignment or the option "realign-stack" is off.

This will cause miscompile if the address is treated as aligned and add is
replaced with or in DAGCombine.

Added a bool StackRealignable to TargetFrameLowering to check whether stack
realignment is implemented for the target. Also added a bool RealignOption
to MachineFrameInfo to check whether the option "realign-stack" is on.

rdar://12713765


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169197 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-04 00:52:33 +00:00
Jakub Staszak
46608c0f64 Use dyn_cast instead of isa and cast. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169196 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-04 00:50:06 +00:00
Jakob Stoklund Olesen
46f6fe7a45 Remove VirtRegMap::getRegAllocPref().
Now that there can be multiple hint registers from targets, it doesn't
make sense to have a function that returns 'the' preferred register.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169190 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-04 00:35:59 +00:00
Jakob Stoklund Olesen
980bddfb1c Use MRI::getSimpleHint() instead of getRegAllocPref() in remaining cases.
Targets can provide multiple hints now, so getRegAllocPref() doesn't
make sense any longer because it only returns one preferred register.
Replace it with getSimpleHint() in the remaining heuristics. This
function only

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169188 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-04 00:30:22 +00:00
Manman Ren
dc8126bbb8 Stack Alignment: move functions from header file MachineFrameInfo.h.
No functional change for this commit. The follow-up patch will add more stuff to
these functions.

rdar://12713765


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169186 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-04 00:26:44 +00:00
Jakob Stoklund Olesen
fc6374439e Add VirtRegMap::hasKnownPreference().
Virtual registers with a known preferred register are prioritized by
RAGreedy. This function makes the condition explicit without depending
on getRegAllocPref().

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169179 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-03 23:23:50 +00:00
Jakob Stoklund Olesen
fc29db1214 Use the new getRegAllocationHints() hook from AllocationOrder.
This simplifies the hinting code quite a bit while making the targets
easier to write at the same time.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169173 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-03 22:51:04 +00:00
Pedro Artigas
49eb628c21 moves doInitialization and doFinalization to the Pass class and removes some unreachable code in MachineModuleInfo
reviewed by Evan Cheng <evan.cheng@apple.com>



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169164 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-03 21:56:57 +00:00
Jakob Stoklund Olesen
7eafc3e7be Add a new hook for providing register allocator hints more flexibly.
The TargetRegisterInfo::getRegAllocationHints() function is going to
replace the existing mechanisms for providing target-dependent hints to
the register allocator: ResolveRegAllocHint() and
getRawAllocationOrder().

The new hook is more flexible because it allows the target to provide
multiple preferred candidate registers for each virtual register, and it
is easier to use because targets are not required to return a reference
to a constant array like getRawAllocationOrder().

An optional VirtRegMap argument can be used to provide target-dependent
hints that depend on the provisional assignments of other virtual
registers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169154 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-03 21:17:00 +00:00
Eli Bendersky
d4a05e0c2c Fix PR12942: Allow two CUs to be generated from the same source file.
Thanks Eric for the review.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169142 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-03 18:45:45 +00:00
Chandler Carruth
d04a8d4b33 Use the new script to sort the includes of every file under lib.
Sooooo many of these had incorrect or strange main module includes.
I have manually inspected all of these, and fixed the main module
include to be the nearest plausible thing I could find. If you own or
care about any of these source files, I encourage you to take some time
and check that these edits were sensible. I can't have broken anything
(I strictly added headers, and reordered them, never removed), but they
may not be the headers you'd really like to identify as containing the
API being implemented.

Many forward declarations and missing includes were added to a header
files to allow them to parse cleanly when included first. The main
module rule does in fact have its merits. =]

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169131 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-03 16:50:05 +00:00
Nadav Rotem
a569a80e58 Allow merging multiple store sequences on the same chain.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169111 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-02 17:14:09 +00:00
Andrew Trick
657b75b994 misched: Fix RegisterPressureTracker handling of DebugVals.
Assertion failed: (TopRPTracker.getPos() == RegionBegin && "bad initial Top tracker").
rdar://12790302.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169072 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-01 01:22:49 +00:00
Andrew Trick
177d87ac8d misched: Fix the DAG builder to handle an undef operand at ExitSU.
Assertion failed: (VNI && "No value to read by operand")
rdar://12790267.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169071 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-01 01:22:44 +00:00
Andrew Trick
30fe61aa35 misched: Fix LiveInterval update to better handle DebugVal.
Assertion failed: (itr != mi2iMap.end() && "Instruction not found in maps.")
rdar://12777252.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169070 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-01 01:22:41 +00:00
Andrew Trick
67bdd42d1e misched: fix RegionBegin when DebugValues get shuffled to the top.
assert (RemainingInstrs == 0 && "Instruction count mismatch!")

rdar://12776937.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169069 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-01 01:22:38 +00:00
Jakob Stoklund Olesen
8c3dccde92 Simplify REG_SEQUENCE lowering.
The TwoAddressInstructionPass takes the machine code out of SSA form by
expanding REG_SEQUENCE instructions into copies. It is no longer
necessary to rewrite the registers used by a REG_SEQUENCE instruction
because the new coalescer algorithm can do it now.

REG_SEQUENCE is just converted to a sequence of sub-register copies now.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169067 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-01 01:06:44 +00:00
Eric Christopher
98e237fc69 Add some first skeleton work for the DWARF5 Fission proposal. Emit
part of the compile unit CU and start separating out information into
the various sections that will be pulled out later.

WIP.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169061 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-30 23:59:06 +00:00