Commit Graph

10 Commits

Author SHA1 Message Date
Daniel Dunbar
2724915c17 llvm-mc/AsmMatcher: Tweaks in response to feedback.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78404 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-07 20:33:39 +00:00
Daniel Dunbar
20927f26fc llvm-mc/AsmMatcher: Move to a slightly more sane matching design.
- Still not very sane, but a least its not 60k lines on X86. :)

 - In terms of correctness, currently some things are hard wired for X86, and we
   still don't properly resolve ambiguities (this is ignoring the instructions
   we don't even match due to funny .td stuff or other corner cases).

The high level changes:
 1. Represent tokens which are significant for matching explicitly as separate
    operands. This uniformly handles not only the instruction mnemonic, but
    also 'signficiant' syntax like the '*' in "call * ...".

 2. Separate the matching of operands to an instruction from the construction of
    the MCInst. In theory this can be done during matching, but since the number
    of variations is small I think it makes sense to decompose the problems.

 3. Improved a few of the mechanisms to at least successfully flatten / tokenize
    the assembly strings for PowerPC and ARM.

 4. The comment at the top of AsmMatcherEmitter.cpp explains the approach I'm
    moving towards for handling ambiguous instructions. The high-bit is to infer
    a partial ordering of the operand classes (and force the user to specify one
    if we can't) and use that to resolve ambiguities.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78378 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-07 08:26:05 +00:00
Daniel Dunbar
53a7f16dcc TableGen / AsmMatcher: Tweaks to avoid generating completely bogus match
functions.
 - Fix variant flattening when the variant embeds an operand reference.

 - Ignore instructions which reference an operand multiple times (e.g., "xorb
   $dst, $dst"), and operands which have extra flags (e.g., "$dst:subreg32").


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78099 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 20:36:45 +00:00
Daniel Dunbar
cdcb388a58 Change MCOperand to use Create style instead of Make style for constructing
operands.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77837 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-02 00:09:22 +00:00
Daniel Dunbar
a027d222e1 llvm-mc: Match a few X86 instructions.
- This is "experimental" code, I am feeling my way around and working out the
   best way to do things (and learning tblgen in the process). Comments welcome,
   but keep in mind this stuff will change radically.

 - This is enough to match "subb" and friends, but not much else. The next step is to
   automatically generate the matchers for individual operands.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77657 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-31 02:32:59 +00:00
Daniel Dunbar
7212f80966 Remove unintended changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77616 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-30 18:29:44 +00:00
Daniel Dunbar
fe09b2098a Twines: Don't allow implicit conversion from integers, this is too tricky.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77605 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-30 17:37:43 +00:00
Daniel Dunbar
0e2771f4c4 Match X86 register names to number.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77404 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-29 00:02:19 +00:00
Daniel Dunbar
22be5225ff tblgen/AsmMatcher: Emit simple matcher for register names.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76212 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-17 18:51:11 +00:00
Daniel Dunbar
d51ffcf303 Stub out assembly matcher (.s -> MCInst) tblgen backend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75378 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-11 19:39:44 +00:00