Commit Graph

25 Commits

Author SHA1 Message Date
Chris Lattner
ba4733d901 Remove what little AIX support we have. It has never been tested and isn't
complete.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29156 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-15 01:24:23 +00:00
Chris Lattner
8fa05dac39 Force 64-bit register availability in 64-bit mode. For real.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28837 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-16 20:05:06 +00:00
Chris Lattner
af89fa609b Remove the -darwin and -aix llc options, inferring darwinism and aixism from
the target triple & subtarget info.  woo.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28835 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-16 18:50:48 +00:00
Chris Lattner
7c1fb5f08c Document the subtarget features better, make sure that 64-bit mode, 64-bit
support, and 64-bit register use are all consistent with each other.

Add a new "IsPPC" feature, to distinguish ppc32 vs ppc64 targets, use this
to configure TargetData differently.  This not makes ppc64 blow up on lots
of stuff :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28825 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-16 17:50:12 +00:00
Chris Lattner
a7a5854f1c Rename some subtarget features. A CPU now can *have* 64-bit instructions,
can in 32-bit mode we can choose to optionally *use* 64-bit registers.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28824 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-16 17:34:12 +00:00
Chris Lattner
94de9a8951 First baby step towards ppc64 support. This adds a new -march=ppc64 backend
that is currently just like ppc32 :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28813 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-16 01:37:27 +00:00
Chris Lattner
5126984b1d Compile this:
void foo(float a, int *b) { *b = a; }

to this:

_foo:
        fctiwz f0, f1
        stfiwx f0, 0, r4
        blr

instead of this:

_foo:
        fctiwz f0, f1
        stfd f0, -8(r1)
        lwz r2, -4(r1)
        stw r2, 0(r4)
        blr

This implements CodeGen/PowerPC/stfiwx.ll, and also incidentally does the
right thing for GCC bugzilla 26505.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26447 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-01 05:50:56 +00:00
Evan Cheng
4c1aa86657 - Added option -relocation-model to set relocation model. Valid values include static, pic,
dynamic-no-pic, and default.
PPC and x86 default is dynamic-no-pic for Darwin, pic for others.
- Removed options -enable-pic and -ppc-static.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26315 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-22 20:19:42 +00:00
Chris Lattner
969097968c add a note about how we should implement this FIXME from the legalizer:
// FIXME: revisit this when we have some kind of mechanism by which targets
    // can decided legality of vector constants, of which there may be very
    // many.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25733 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-28 05:40:47 +00:00
Chris Lattner
1d05cb47a9 add an option to generate completely non-pic code, corresponding to what
gcc -static produces on PPC.  This is used for building kexts and other things.

With this, materializing the address of a global looks like:

        lis r2, ha16(L_H$non_lazy_ptr)
        la r3, lo16(L_H$non_lazy_ptr)(r2)

we're still emitting stubs for functions, which is wrong.  That is next.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24399 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-17 18:55:48 +00:00
Jim Laskey
6cee630070 Allow itineraries to be passed through the Target Machine.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24139 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-01 20:06:59 +00:00
Jim Laskey
581a8f79bc Give full control of subtarget features over to table generated code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24013 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-26 17:30:34 +00:00
Jim Laskey
34bd5d5d87 Preparation of supporting scheduling info. Need to find info based on selected
CPU.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23974 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-25 15:15:28 +00:00
Chris Lattner
2224dcc88c Simplify this, matching changes in the tblgen emitter
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23909 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-23 22:34:25 +00:00
Jim Laskey
f5fc2cbd6b Plugin new subtarget backend into the build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23870 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-21 19:05:19 +00:00
Nate Begeman
9d2b817fcb Do the right thing and enable 64 bit regs under the control of a subtarget
option.  Currently the only way to enable this is to specify the
64bitregs mattr flag.  It is never enabled by default on any config yet.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23779 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-18 00:56:42 +00:00
Chris Lattner
2668959b88 Rename PowerPC*.h to PPC*.h
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23743 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-14 23:51:18 +00:00
Chris Lattner
c98d823649 On non-apple systems, when using -march=ppc32, do not print:
'' is not a recognized processor for this target (ignoring processor)

Default to "generic" instead of "" for the default CPU.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23257 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-07 05:45:33 +00:00
Nate Begeman
d401dff796 Add accessor for 64bit flag, so that we can tell when it is safe to
generate the fun in-register fp<->long instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23244 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-06 15:30:12 +00:00
Jim Laskey
839615a510 Add help support for -mcpu and -mattr.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23222 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-02 19:27:43 +00:00
Chris Lattner
1e9de3ed2d Decouple fsqrt from gpul optimizations, implementing fsqrt.ll.
Remove the -enable-gpopt option which is subsumed by feature flags.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23218 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-02 18:33:05 +00:00
Jim Laskey
b1e1180ca0 1. Use SubtargetFeatures in llc/lli.
2. Propagate feature "string" to all targets.

3. Implement use of SubtargetFeatures in PowerPCTargetSubtarget.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23192 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-01 21:38:21 +00:00
Chris Lattner
3c304a3ba1 Consolidate the GPOpt stuff to all use the Subtarget, instead of still
depending on the command line option.  Now the command line option just
sets the subtarget as appropriate.  G5 opts will now default to on on
G5-enabled nightly testers among other machines.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22688 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-05 22:05:03 +00:00
Chris Lattner
ba25365140 Enable gp optimizations by default when available, even when a target triple
is available, since the target triple doesn't specify whether to use gpopts
or not.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22685 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-05 21:25:13 +00:00
Nate Begeman
8c00f8cdc7 Add Subtarget support to PowerPC. Next up, using it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22644 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-04 07:12:09 +00:00