Commit Graph

276 Commits

Author SHA1 Message Date
Evan Cheng
c498b0281f Clean up sub-register implementation by moving subReg information back to
MachineOperand auxInfo. Previous clunky implementation uses an external map
to track sub-register uses. That works because register allocator uses
a new virtual register for each spilled use. With interval splitting (coming
soon), we may have multiple uses of the same register some of which are
of using different sub-registers from others. It's too fragile to constantly
update the information.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44104 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-14 07:59:08 +00:00
Dale Johannesen
b97aec663b Add parameter to getDwarfRegNum to permit targets
to use different mappings for EH and debug info;
no functional change yet.
Fix warning in X86CodeEmitter.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44056 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-13 19:13:01 +00:00
Evan Cheng
e7c8754a52 Fix x86-64 jit: remove reliance on Dwarf numbers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44048 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-13 17:54:34 +00:00
Anton Korobeynikov
f191c80cd7 Use TableGen to emit information for dwarf register numbers.
This makes DwarfRegNum to accept list of numbers instead.
Added three different "flavours", but only slightly tested on x86-32/linux.
Please check another subtargets if possible,


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43997 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-11 19:50:10 +00:00
Dale Johannesen
7a42f24f0c Revert previous rewrite per chris's comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43950 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-09 18:07:11 +00:00
Dale Johannesen
3556bc1a9d Rewrite Dwarf number handling per review comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43918 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-09 00:47:10 +00:00
Dale Johannesen
4542edcaa7 Complete conditionalization of Dwarf reg numbers.
Would somebody not on Darwin please make sure this
doesn't break anything.  Exception handling failures
would be the most likely symptom.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43844 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-07 21:48:35 +00:00
Dale Johannesen
483ec21d90 Interchange Dwarf numbers of ESP and EBP on x86 Darwin.
Much improvement in exception handling.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43794 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-07 00:25:05 +00:00
Evan Cheng
db807edd66 Use movups to spill / restore SSE registers on targets where stacks alignment is
less than 16. This is a temporary solution until dynamic stack alignment is
implemented.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43703 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-05 07:30:01 +00:00
Anton Korobeynikov
8d9d74eaa8 Fix off-by-one stack offset computations (dwarf information) for callee-saved
registers in case, when FP pointer was eliminated. This should fixes misc. random
EH-related crahses, when stuff is compiled with -fomit-frame-pointer.
Thanks Duncan for nailing this bug!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43381 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-26 09:13:24 +00:00
Evan Cheng
42b08be973 Fix an unfolding bug.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43212 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-22 03:03:20 +00:00
Evan Cheng
f7c9695a38 Resolve unfold tables ambiguity.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43194 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-19 23:50:58 +00:00
Evan Cheng
66f7163545 Local spiller optimization:
Turn a store folding instruction into a load folding instruction. e.g.
     xorl  %edi, %eax
     movl  %eax, -32(%ebp)
     movl  -36(%ebp), %eax
     orl   %eax, -32(%ebp)
=>
     xorl  %edi, %eax
     orl   -36(%ebp), %eax
     mov   %eax, -32(%ebp)
This enables the unfolding optimization for a subsequent instruction which will
also eliminate the newly introduced store instruction.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43192 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-19 21:23:22 +00:00
Evan Cheng
f0a0cddbcd - Added getOpcodeAfterMemoryUnfold(). It doesn't unfold an instruction, but only returns the opcode of the instruction post unfolding.
- Fix some copy+paste bugs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43153 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-18 22:40:57 +00:00
Evan Cheng
58184e6878 Use SmallVectorImpl instead of SmallVector with hardcoded size in MRegister public interface.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43150 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-18 21:29:24 +00:00
Evan Cheng
106e8020bd Change unfoldMemoryOperand(). User is now responsible for passing in the
register used by the unfolded instructions. User can also specify whether to
unfold the load, the store, or both.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42946 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-13 02:35:06 +00:00
Evan Cheng
f4a9c69ff6 Fold load / store into MOV32to32_ and MOV16to16_.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42895 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-12 08:38:01 +00:00
Arnold Schwaighofer
c85e1716f0 Added tail call optimization to the x86 back end. It can be
enabled by passing -tailcallopt to llc.  The optimization is
performed if the following conditions are satisfied:
* caller/callee are fastcc
* elf/pic is disabled OR
  elf/pic enabled + callee is in module + callee has
  visibility protected or hidden


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42870 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-11 19:40:01 +00:00
Chris Lattner
f443ba7f97 disable this entirely: it is causing use of invalidated iterators and infinite looping.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42739 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-07 22:00:31 +00:00
Chris Lattner
eac9385f09 Fix many regressions on x86 by avoiding dereferencing the end iterator.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42738 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-07 21:53:12 +00:00
Anton Korobeynikov
2508372746 Oops, I really wanted to commit this part also :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42700 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-06 16:39:43 +00:00
Anton Korobeynikov
4f1c33f7c8 Move merge code into new helper function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42699 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-06 16:17:49 +00:00
Evan Cheng
75b4e46b8a Added storeRegToAddr, loadRegFromAddr, and unfoldMemoryOperand's.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42624 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-05 01:34:55 +00:00
Evan Cheng
7f3394f379 Refactor code to add load / store folded instructions -> register only
instructions reverse map.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42509 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-01 23:44:33 +00:00
Evan Cheng
e5f6204cd5 Enabling new condition code modeling scheme.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42459 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-29 00:00:36 +00:00
Dan Gohman
82482944ed TargetAsmInfo::getAddressSize() was incorrect for x86-64 and 64-bit targets
other than PPC64. Instead of fixing it, just remove it and fix all the
places that use it to use TargetData::getPointerSize() instead, as there
aren't very many. Most of the references were in DwarfWriter.cpp.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42419 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-27 23:12:31 +00:00
Evan Cheng
3f2d9ec186 Use GR64 in 64-bit mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42417 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-27 21:50:05 +00:00
Evan Cheng
ff11026575 - Added MRegisterInfo::getCrossCopyRegClass() hook. For register classes where reg to reg copies are not possible, this returns another register class which registers in the specified register class can be copied to (and copy back from).
- X86 copyRegToReg() now supports copying between EFLAGS and GR32 / GR64 registers.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42372 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-26 21:31:07 +00:00
Evan Cheng
9efce638d3 Allow copyRegToReg to emit cross register classes copies.
Tested with "make check"!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42346 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-26 06:25:56 +00:00
Anton Korobeynikov
29be8486e3 Correctly restore stack pointer after realignment in main() on Cygwin/Mingw32
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42332 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-26 00:13:34 +00:00
Evan Cheng
fdd0837448 Missing load / store folding entries.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42323 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-25 22:10:43 +00:00
Evan Cheng
0488db9b99 Added support for new condition code modeling scheme (i.e. physical register dependency). These are a bunch of instructions that are duplicated so the x86 backend can support both the old and new schemes at the same time. They will be deleted after
all the kinks are worked out.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42285 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-25 01:57:46 +00:00
Dan Gohman
5e6e93ecdc The code that used the StartLabelId label was removed, so remove the
code that creates the label too.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42265 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-24 16:44:26 +00:00
Dan Gohman
a4ddacf60b Fix several more entries in the x86 reload/remat folding tables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42162 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-20 14:17:21 +00:00
Evan Cheng
fab7eff0fa PSHUFDmi, etc. are actually folding a load, not a store.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42147 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-19 19:02:47 +00:00
Dan Gohman
869b2b2c23 Move the entries for 64-bit CMP, IMUL, and a few others into the correct
tables so that they are eligible for reload/remat folding. And add
entries for JMP and CALL.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42094 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-18 14:59:14 +00:00
Dale Johannesen
ca8035e356 Remove RSTRegClass case from loadRegFromStackSlot
and storeRegToStackSlot.  Evan and I concluded this
should never be needed and it appears to be true.
(It if is needed, adjustment would be needed for
long double to work.)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42049 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-17 20:15:38 +00:00
Dale Johannesen
9e3d3abd93 Remove the assumption that FP's are either float or
double from some of the many places in the optimizers
it appears, and do something reasonable with x86
long double.
Make APInt::dump() public, remove newline, use it to
dump ConstantSDNode's.
Allow APFloats in FoldingSet.
Expand X86 backend handling of long doubles (conversions
to/from int, mostly).



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41967 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-14 22:26:36 +00:00
Dan Gohman
92dfe2001e Remove isReg, isImm, and isMBB, and change all their users to use
isRegister, isImmediate, and isMachineBasicBlock, which are equivalent,
and more popular.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41958 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-14 20:33:02 +00:00
Evan Cheng
b0869ed44d It's not safe to rematerialize MOV32r0 etc. by simply cloning the original
instruction. These are implemented with xor which will modify the conditional
code. They should be rematerialized as move instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41802 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-10 20:48:53 +00:00
Owen Anderson
718cb665ca Add lengthof and endof templates that hide a lot of sizeof computations.
Patch by Sterling Stein!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41758 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-07 04:06:50 +00:00
Evan Cheng
f4c3a59dba Added support to fold X86 load / store instructions. This allow rematerialized loads to be folded into their uses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41599 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-30 05:54:07 +00:00
Duncan Sands
ee46574931 Move getX86RegNum into X86RegisterInfo and use it
in the trampoline lowering.  Lookup the jump and
mov opcodes for the trampoline rather than hard
coding them.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41577 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-29 19:01:20 +00:00
Evan Cheng
fcc8793dc8 Make sure epilogue esp adjustment is placed before any terminator and pop instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40538 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-26 17:45:41 +00:00
Anton Korobeynikov
d97b8cd38c Heal EH handling stuff by emitting correct offsets to callee-saved registers.
Pretty hackish, but code itself is dirty mess, so we won't make anything worse. :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40472 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-24 21:07:39 +00:00
Evan Cheng
64d80e3387 Change instruction description to split OperandList into OutOperandList and
InOperandList. This gives one piece of important information: # of results
produced by an instruction.
An example of the change:
def ADD32rr  : I<0x01, MRMDestReg, (ops GR32:$dst, GR32:$src1, GR32:$src2),
                 "add{l} {$src2, $dst|$dst, $src2}",
                 [(set GR32:$dst, (add GR32:$src1, GR32:$src2))]>;
=>
def ADD32rr  : I<0x01, MRMDestReg, (outs GR32:$dst), (ins GR32:$src1, GR32:$src2),
                 "add{l} {$src2, $dst|$dst, $src2}",
                 [(set GR32:$dst, (add GR32:$src1, GR32:$src2))]>;


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40033 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-19 01:14:50 +00:00
Evan Cheng
7e7bbf8271 Only adjust esp around calls in presence of alloca.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40028 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-19 00:42:05 +00:00
Evan Cheng
3c46eefba2 Use MOV instead of LEA to restore ESP if callee-saved frame size is 0; if previous instruction updates esp, fold it in.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40018 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-18 21:26:06 +00:00
Evan Cheng
9b8c674432 Fold prologue esp update when possible.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@39984 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-17 21:26:42 +00:00
Evan Cheng
5b3332cc27 Make sure not to break eh_return.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@39978 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-17 18:40:47 +00:00