Owen Anderson
f4f9c4f1cf
Replace the dynamically computed std::set lookup method for subregisters with a hashtable-based
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version that is computed by tblgen at the time LLVM is compiled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52945 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-01 00:18:52 +00:00
Evan Cheng
2036835346
Eliminate TargetRegisterDesc::ImmSubRegs. It's no longer in use.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52892 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-30 07:32:56 +00:00
Dale Johannesen
b5dae00325
Fixes the last x86-64 test failure in compat.exp:
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<16 x float> is 64-byte aligned (for some reason),
which gets us into the stack realignment code. The
computation changing FP-relative offsets to SP-relative
was broken, assiging a spill temp to a location
also used for parameter passing. This
fixes it by rounding up the stack frame to a multiple
of the largest alignment (I concluded it wasn't fixable
without doing this, but I'm not very sure.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52750 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-26 01:51:13 +00:00
Duncan Sands
83ec4b6711
Wrap MVT::ValueType in a struct to get type safety
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and better control the abstraction. Rename the type
to MVT. To update out-of-tree patches, the main
thing to do is to rename MVT::ValueType to MVT, and
rewrite expressions like MVT::getSizeInBits(VT) in
the form VT.getSizeInBits(). Use VT.getSimpleVT()
to extract a MVT::SimpleValueType for use in switch
statements (you will get an assert failure if VT is
an extended value type - these shouldn't exist after
type legalization).
This results in a small speedup of codegen and no
new testsuite failures (x86-64 linux).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52044 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-06 12:08:01 +00:00
Chuck Rose III
cc51c31953
VisualStudio project files updated. #include <algorithm> added to make VisualStudio happy. Also had to undefine setjmp because of #include <csetjmp> turning setjmp into _setjmp in VisualStudio.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49743 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-15 21:27:11 +00:00
Evan Cheng
8102703d70
Sort sub-registers and super-registers lists according to super-sub register relations. e.g. X86::RAX sub-register list is EAX, AX, AL, AH (order of last two are not guaranteed).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49714 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-15 07:56:03 +00:00
Dan Gohman
950a4c40b8
Add explicit keywords.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48801 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-25 22:06:05 +00:00
Chris Lattner
ca796402be
emit an ID # for each regclass ID. Chris doesn't like to have to count.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48200 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-11 00:00:23 +00:00
Bill Wendling
e6d088acc9
Rename PrintableName to Name.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47629 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-26 21:47:57 +00:00
Bill Wendling
74ab84c31e
Change "Name" to "AsmName" in the target register info. Gee, a refactoring tool
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would have been a Godsend here!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47625 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-26 21:11:01 +00:00
Bill Wendling
181eb737b2
Some platforms use the same name for 32-bit and 64-bit registers (like
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%r3 on PPC) in their ASM files. However, it's hard for humans to read
during debugging. Adding a new field to the register data that lets you
specify a different name to be printed than the one that goes into the
ASM file -- %x3 instead of %r3, for instance.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47534 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-24 00:56:13 +00:00
Dan Gohman
6f0d024a53
Rename MRegisterInfo to TargetRegisterInfo.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46930 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-10 18:45:23 +00:00
Chris Lattner
6cefb77a70
change getQualifiedName to be a global function.
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Split the pattern parsing code out from the dag isel emitter into it's own file.
No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45632 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-05 22:25:12 +00:00
Chris Lattner
3060910e29
remove attributions from utils.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45419 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-29 20:37:13 +00:00
Dale Johannesen
b97aec663b
Add parameter to getDwarfRegNum to permit targets
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to use different mappings for EH and debug info;
no functional change yet.
Fix warning in X86CodeEmitter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44056 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-13 19:13:01 +00:00
Owen Anderson
e7e113361e
Fix on 64-bit machines.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44001 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-12 00:56:04 +00:00
Anton Korobeynikov
f191c80cd7
Use TableGen to emit information for dwarf register numbers.
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This makes DwarfRegNum to accept list of numbers instead.
Added three different "flavours", but only slightly tested on x86-32/linux.
Please check another subtargets if possible,
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43997 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-11 19:50:10 +00:00
Dale Johannesen
483ec21d90
Interchange Dwarf numbers of ESP and EBP on x86 Darwin.
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Much improvement in exception handling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43794 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-07 00:25:05 +00:00
Evan Cheng
a3ca3149f2
Add CopyCost to TargetRegisterClass. This specifies the cost of copying a value
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between two registers in the specific class.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42123 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-19 01:35:01 +00:00
Chandler Carruth
6994040a95
This is the patch to provide clean intrinsic function overloading support in LLVM. It cleans up the intrinsic definitions and generally smooths the process for more complicated intrinsic writing. It will be used by the upcoming atomic intrinsics as well as vector and float intrinsics in the future.
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This also changes the syntax for llvm.bswap, llvm.part.set, llvm.part.select, and llvm.ct* intrinsics. They are automatically upgraded by both the LLVM ASM reader and the bitcode reader. The test cases have been updated, with special tests added to ensure the automatic upgrading is supported.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40807 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-04 01:51:18 +00:00
Chuck Rose III
936baaa5ae
VStudio compiler errors and placing Function*->ExFunc map under ManagedStatic control.
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This commit fixes two things. One is a pair of VStudio compiler errors stemming from variables
which defined within the for loop statement and also within the body of the for loop. I fixed these
by renaming one of the two variables. Additionally, I've made the Function*->ExFunc map in
ExternalFunctions.cpp a ManagedStatic object, so that cleanup will be done on llvm_shutdown. In repeated
uses of the interpreter, where the same Function* address may get used for completely differnet functions,
this was causing a crash.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40558 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-27 18:26:35 +00:00
Christopher Lamb
1367fd09cb
Have register info provide the inverse mapping of register->superregisters. PR1350
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40519 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-26 08:01:58 +00:00
Evan Cheng
5e4f292e53
One additional field in TargetRegisterDesc.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37760 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-27 17:09:34 +00:00
Evan Cheng
c4f2fe0694
Add immediate sub-registers.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37738 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-26 20:59:16 +00:00
Christopher Lamb
a321125e8b
Add support to tablegen for specifying subregister classes on a per register class basis.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37572 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-13 22:20:15 +00:00
Bill Wendling
851879c4cf
Patches by Chuck Rose to unbreak V Studio builds.
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Thanks Chuck!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37428 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-04 23:52:59 +00:00
Dan Gohman
b9daee9ece
Remove the operator<< for MVT::ValueType in preparation for MVT::ValueType
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being changed from an enum to an integer type, which can't have a custom
operator<< overload.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37412 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-04 16:11:03 +00:00
Nate Begeman
6f7c8ffd9a
A bit of feedback from Chris that I missed; error rather than asserting.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36619 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-01 06:08:36 +00:00
Nate Begeman
7bf1c272ab
llvm bug #1350 , parts 1, 2, and 3.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36618 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-01 05:57:02 +00:00
Evan Cheng
4fc4fab856
Bug fix; add super-registers sets.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36296 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-21 00:55:29 +00:00
Evan Cheng
3cafbf7e5f
Add sub-registers sets.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36278 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-20 21:13:46 +00:00
Chris Lattner
114e5dd464
emit an enum value for the # of target registers.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34624 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-26 03:34:38 +00:00
Bill Wendling
f5da13367f
What should be the last unnecessary <iostream>s in the library.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32333 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-07 22:21:48 +00:00
Jim Laskey
60f09928a0
Use an enumeration to eliminate data relocations.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29249 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-21 20:57:35 +00:00
Evan Cheng
3b0c0148ed
Make sub- and super- register classes const.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29200 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-19 05:58:18 +00:00
Evan Cheng
6f6602ce42
Make sub- super- reg-class tables static.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29190 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-18 22:18:31 +00:00
Evan Cheng
d7c2c86239
Allow more use of iPTR in patterns.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28790 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-15 00:16:37 +00:00
Chris Lattner
d74ea2bbd8
Patches to make the LLVM sources more -pedantic clean. Patch provided
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by Anton Korobeynikov! This is a step towards closing PR786.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28447 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-24 17:04:05 +00:00
Evan Cheng
764811f145
Don't generate getCalleeSaveReg and getCalleeSaveRegClasses anymore.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28376 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-18 00:08:46 +00:00
Evan Cheng
2ca0efd71a
Also add super- register classes info.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28221 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-11 07:30:26 +00:00
Evan Cheng
8d58e6a9be
Add sub-register class information.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28195 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-09 06:34:26 +00:00
Jim Laskey
47622e3721
Add dwarf register numbering to register data.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27081 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-24 21:15:58 +00:00
Duraid Madina
12f7578214
This gets most of the backends building with HP HappyC++.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25029 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-27 10:56:22 +00:00
Nate Begeman
6510b22cec
Support multiple ValueTypes per RegisterClass, needed for upcoming vector
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work. This change has no effect on generated code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24563 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-01 04:51:06 +00:00
Chris Lattner
366080c5e6
Switch more code over to using getValueAsListOfDefs. Look at all the -'s. :)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24074 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-28 22:59:53 +00:00
Chris Lattner
4b2e5a680f
Emit the value type for each register class.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23584 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-02 06:23:37 +00:00
Chris Lattner
0f21fd5204
Rename MRegisterDesc -> TargetRegisterDesc for consistency
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23564 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-30 17:49:27 +00:00
Chris Lattner
22842105de
remove some more initializers
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23562 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-30 17:41:05 +00:00
Chris Lattner
2f02ed9a1f
trim down the target info structs now that we have a preferred spill register class for each callee save register
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23560 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-30 17:35:22 +00:00
Chris Lattner
4794797f12
Compute a preferred spill register class for each callee-save register
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23553 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-30 06:44:45 +00:00