Daniel Sanders 144749b59b Merging r227430: ...

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r227430 | vmedic | 2015-01-29 11:33:41 +0000 (Thu, 29 Jan 2015) | 1 line

[Mips][Disassembler] When disassembler meets cache/pref instructions for r6 it crashes as the access to operands array is out of range. This patch adds dedicated decoder method for R6 CACHE_HINT_DESC class that properly handles decoding of these instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_36@235864 91177308-0d34-0410-b5e6-96231b3b80d8

2015-04-27 11:59:49 +00:00

..

AArch64

Condition codes AL and NV are invalid in the aliases that use

2014-06-10 13:11:35 +00:00

ARM

Add support for ARM modified-immediate assembly syntax.

2014-12-02 10:53:20 +00:00

Hexagon

[Hexagon] Adding floating point classification and creation.

2015-01-07 20:28:57 +00:00

Mips

Merging r227430:

2015-04-27 11:59:49 +00:00

PowerPC

[PowerPC] Add support for the CMPB instruction

2015-01-03 01:16:37 +00:00

Sparc

Reduce verbiage of lit.local.cfg files

2014-06-09 22:42:55 +00:00

SystemZ

[SystemZ] Add MC support for LEDBRA, LEXBRA and LDXBRA

2014-07-10 11:00:55 +00:00

X86

[X86] Don't print 'dword ptr' or 'qword ptr' on the operand to some of the LEA variants in Intel syntax. The memory operand is inherently unsized.

2015-01-08 07:41:30 +00:00

XCore

Reduce verbiage of lit.local.cfg files

2014-06-09 22:42:55 +00:00