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LLVM backend for 6502
ce13b919e6
------------------------------------------------------------------------ r243745 | dsanders | 2015-07-31 13:58:55 +0100 (Fri, 31 Jul 2015) | 17 lines [regalloc] Make RegMask clobbers prevent merging vreg's into PhysRegs when hoisting def's upwards. Summary: This prevents vreg260 and D7 from being merged in: %vreg260<def> = LDC1 ... JAL <ga:@sin>, <regmask ... list not containing D7 ...> %D7<def> = COPY %vreg260; ... Doing so is not valid because the JAL clobbers the D7. This fixes the almabench regression in the LLVM 3.7.0 release branch. Reviewers: MatzeB Subscribers: MatzeB, qcolombet, hans, llvm-commits Differential Revision: http://reviews.llvm.org/D11649 ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_37@243834 91177308-0d34-0410-b5e6-96231b3b80d8 |
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bindings | ||
cmake | ||
docs | ||
examples | ||
include | ||
lib | ||
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test | ||
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.gitignore | ||
CMakeLists.txt | ||
CODE_OWNERS.TXT | ||
configure | ||
CREDITS.TXT | ||
LICENSE.TXT | ||
llvm.spec.in | ||
LLVMBuild.txt | ||
Makefile | ||
Makefile.common | ||
Makefile.config.in | ||
Makefile.rules | ||
README.txt |
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