llvm-6502/include/llvm/CodeGen
Dan Gohman 258c58cc62 Revert r107655.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107668 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-06 15:49:48 +00:00
..
Analysis.h
AsmPrinter.h Trailing whitespace. 2010-07-01 01:00:22 +00:00
BinaryObject.h
CalcSpillWeights.h
CallingConvLower.h Add versions of OutputArgReg, AnalyzeReturn, and AnalyzeCallOperands 2010-07-06 15:39:54 +00:00
FastISel.h Teach fast-isel to avoid loading a value from memory when it's already 2010-07-01 03:49:38 +00:00
GCMetadata.h Trailing whitespace. 2010-07-01 01:00:22 +00:00
GCMetadataPrinter.h Trailing whitespace. 2010-07-01 01:00:22 +00:00
GCs.h
GCStrategy.h
IntrinsicLowering.h
ISDOpcodes.h When splitting a VAARG, remember its alignment. 2010-06-26 18:22:20 +00:00
JITCodeEmitter.h
LatencyPriorityQueue.h Eliminate the use of PriorityQueue and just use a std::vector, 2010-05-26 18:52:00 +00:00
LinkAllAsmWriterComponents.h
LinkAllCodegenComponents.h Remove the local register allocator. 2010-06-15 21:58:33 +00:00
LiveInterval.h Rematerialize as much as possible before inserting spills and reloads. 2010-07-02 17:44:57 +00:00
LiveIntervalAnalysis.h Remove the now unused LiveIntervals::getVNInfoSourceReg(). 2010-06-24 20:18:15 +00:00
LiveStackAnalysis.h Introduce SpecificBumpPtrAllocator, a wrapper for BumpPtrAllocator which allows 2010-03-30 20:16:45 +00:00
LiveVariables.h
MachineBasicBlock.h Revert r107655. 2010-07-06 15:49:48 +00:00
MachineCodeEmitter.h
MachineCodeInfo.h
MachineConstantPool.h
MachineDominators.h
MachineFrameInfo.h Remove isSS argument from CreateFixedObject. Fixed objects cannot be spill slots so it's always false. 2010-07-03 00:40:23 +00:00
MachineFunction.h Revert r107205 and r107207. 2010-06-29 22:34:52 +00:00
MachineFunctionAnalysis.h
MachineFunctionPass.h Make MachineFunctionPass::createPrinterPass private, as no subclasses 2010-06-05 01:19:12 +00:00
MachineInstr.h Detect and handle COPY in many places. 2010-07-03 00:04:37 +00:00
MachineInstrBuilder.h
MachineJumpTableInfo.h Add explicit keywords. 2010-06-18 19:04:37 +00:00
MachineLocation.h
MachineLoopInfo.h Move PHIElimination's SplitCriticalEdge for MachineBasicBlocks out 2010-06-22 17:25:57 +00:00
MachineMemOperand.h
MachineModuleInfo.h
MachineModuleInfoImpls.h
MachineOperand.h Add a TargetRegisterInfo::composeSubRegIndices hook with a default 2010-05-28 18:18:53 +00:00
MachinePassRegistry.h
MachineRegisterInfo.h Begin implementation of an inline spiller. 2010-06-29 23:58:39 +00:00
MachineRelocation.h
MachineSSAUpdater.h
MachORelocation.h
ObjectCodeEmitter.h
Passes.h Remove the local register allocator. 2010-06-15 21:58:33 +00:00
PostRAHazardRecognizer.h Add missing include to unbreak the build. 2010-06-14 22:44:26 +00:00
ProcessImplicitDefs.h
PseudoSourceValue.h
RegAllocRegistry.h
RegisterCoalescer.h Be more strict about subreg-to-subreg copies in CoalescerPair. 2010-06-24 16:19:28 +00:00
RegisterScavenging.h Add register-reuse to frame-index register scavenging. When a target uses 2009-10-07 17:12:56 +00:00
RuntimeLibcalls.h back-end libcall handling for ATOMIC_SWAP (__sync_lock_test_and_set) 2010-06-18 23:03:10 +00:00
ScheduleDAG.h Change push_all to a non-virtual function and implement it in the 2010-05-26 01:10:55 +00:00
ScheduleHazardRecognizer.h
SchedulerRegistry.h Add a hybrid bottom up scheduler that reduce register usage while avoiding 2010-05-20 06:13:19 +00:00
SelectionDAG.h When splitting a VAARG, remember its alignment. 2010-06-26 18:22:20 +00:00
SelectionDAGISel.h Reapply r106634, now that the bug it exposed is fixed. 2010-06-24 14:30:44 +00:00
SelectionDAGNodes.h Add versions of OutputArgReg, AnalyzeReturn, and AnalyzeCallOperands 2010-07-06 15:39:54 +00:00
SlotIndexes.h Handle unindexed instructions in SlotIndices. 2010-07-02 19:54:45 +00:00
TargetLoweringObjectFileImpl.h More data/parsing support for tls directives. Add a few more testcases 2010-05-17 22:53:55 +00:00
ValueTypes.h Fix enum to address array bounds regression. 2010-05-18 21:22:12 +00:00
ValueTypes.td Adding a v8i64 512-bit vector type. This will be used to model ARM NEON intrinsics which translate into a pair of vld / vst instructions that can load / store 8 consecutive 64-bit (D) registers. 2010-05-13 23:55:47 +00:00