llvm-6502/test/CodeGen
Quentin Colombet 010311b104 [RegAllocGreedy][Last Chance Recoloring] Change the name of the exhaustive search option.
fexhaustive-register-search => exhaustive-register-search
'f' is a Clang thing!

This is related to PR18747.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206075 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-11 21:51:09 +00:00
..
AArch64 [AArch64] Implement the isZExtFree APIs. 2014-04-09 20:51:21 +00:00
ARM Move the segmented stack switch to a function attribute 2014-04-10 22:58:43 +00:00
ARM64 [DAGCombiner] DAG combine does not know how to combine indexed loads with 2014-04-09 20:03:05 +00:00
CPP
Generic
Hexagon
Inputs
Mips Re-commit: [mips] abs.[ds], and neg.[ds] should be allowed regardless of -enable-no-nans-fp-math 2014-04-09 09:56:43 +00:00
MSP430 Mark FPB as a reserved register when needed. 2014-04-02 13:13:56 +00:00
NVPTX [NVPTX] Add preliminary intrinsics and codegen support for textures/surfaces 2014-04-09 15:39:15 +00:00
PowerPC [PowerPC] Add a full condition code register to make the "cc" clobber work 2014-04-04 15:15:57 +00:00
R600 SelectionDAG: Use helper function to improve legalization of ISD::MUL 2014-04-11 16:12:01 +00:00
SPARC
SystemZ
Thumb Move the segmented stack switch to a function attribute 2014-04-10 22:58:43 +00:00
Thumb2 Move the segmented stack switch to a function attribute 2014-04-10 22:58:43 +00:00
X86 [RegAllocGreedy][Last Chance Recoloring] Change the name of the exhaustive search option. 2014-04-11 21:51:09 +00:00
XCore