llvm-6502/lib/Target/Alpha
Chris Lattner 6784bdf863 use ins/outs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98866 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-18 20:55:18 +00:00
..
AsmPrinter eliminate the now-unneeded context argument of MBB::getSymbol() 2010-03-13 21:04:28 +00:00
TargetInfo
Alpha.h
Alpha.td
AlphaBranchSelector.cpp
AlphaCallingConv.td Fix PR6444, note still doesn't compile libgcc2 all the way, but fixes that error. May not fix it in an ABI complient way. It wasn't clear what gcc does 2010-03-03 20:15:31 +00:00
AlphaCodeEmitter.cpp
AlphaInstrFormats.td use ins/outs. 2010-03-18 20:55:18 +00:00
AlphaInstrInfo.cpp
AlphaInstrInfo.h
AlphaInstrInfo.td use ins/outs. 2010-03-18 20:55:18 +00:00
AlphaISelDAGToDAG.cpp Sink InstructionSelect() out of each target into SDISel, and rename it 2010-03-02 06:34:30 +00:00
AlphaISelLowering.cpp Move TLOF implementations to libCodegen to resolve layering violation. 2010-02-15 22:37:53 +00:00
AlphaISelLowering.h
AlphaJITInfo.cpp
AlphaJITInfo.h
AlphaLLRP.cpp
AlphaMachineFunctionInfo.h
AlphaMCAsmInfo.cpp
AlphaMCAsmInfo.h
AlphaRegisterInfo.cpp Change the Value argument to eliminateFrameIndex to a type-tagged value. This 2010-03-09 21:45:49 +00:00
AlphaRegisterInfo.h Change the Value argument to eliminateFrameIndex to a type-tagged value. This 2010-03-09 21:45:49 +00:00
AlphaRegisterInfo.td
AlphaRelocations.h
AlphaSchedule.td
AlphaSubtarget.cpp
AlphaSubtarget.h
AlphaTargetMachine.cpp
AlphaTargetMachine.h
CMakeLists.txt
Makefile
README.txt

***

add gcc builtins for alpha instructions


***

custom expand byteswap into nifty 
extract/insert/mask byte/word/longword/quadword low/high
sequences

***

see if any of the extract/insert/mask operations can be added

***

match more interesting things for cmovlbc cmovlbs (move if low bit clear/set)

***

lower srem and urem

remq(i,j):  i - (j * divq(i,j)) if j != 0
remqu(i,j): i - (j * divqu(i,j)) if j != 0
reml(i,j):  i - (j * divl(i,j)) if j != 0
remlu(i,j): i - (j * divlu(i,j)) if j != 0

***

add crazy vector instructions (MVI):

(MIN|MAX)(U|S)(B8|W4) min and max, signed and unsigned, byte and word
PKWB, UNPKBW pack/unpack word to byte
PKLB UNPKBL pack/unpack long to byte
PERR pixel error (sum accross bytes of bytewise abs(i8v8 a - i8v8 b))

cmpbytes bytewise cmpeq of i8v8 a and i8v8 b (not part of MVI extentions)

this has some good examples for other operations that can be synthesised well 
from these rather meager vector ops (such as saturating add).
http://www.alphalinux.org/docs/MVI-full.html