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e.g. v_mad_f32 a, b, c -> v_mad_f32 b, a, c This simplifies matching v_madmk_f32. This looks somewhat surprising, but it appears to be OK to do this. We can commute src0 and src1 in all of these instructions, and that's all that appears to matter. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221910 91177308-0d34-0410-b5e6-96231b3b80d8
93 lines
4.0 KiB
LLVM
93 lines
4.0 KiB
LLVM
; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
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; RUN: llc -march=r600 -mcpu=cypress -verify-machineinstrs < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
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declare float @llvm.fma.f32(float, float, float) nounwind readnone
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declare <2 x float> @llvm.fma.v2f32(<2 x float>, <2 x float>, <2 x float>) nounwind readnone
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declare <4 x float> @llvm.fma.v4f32(<4 x float>, <4 x float>, <4 x float>) nounwind readnone
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declare i32 @llvm.r600.read.tidig.x() nounwind readnone
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; FUNC-LABEL: {{^}}fma_f32:
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; SI: v_fma_f32 {{v[0-9]+, v[0-9]+, v[0-9]+, v[0-9]+}}
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; EG: MEM_RAT_{{.*}} STORE_{{.*}} [[RES:T[0-9]\.[XYZW]]], {{T[0-9]\.[XYZW]}},
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; EG: FMA {{\*? *}}[[RES]]
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define void @fma_f32(float addrspace(1)* %out, float addrspace(1)* %in1,
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float addrspace(1)* %in2, float addrspace(1)* %in3) {
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%r0 = load float addrspace(1)* %in1
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%r1 = load float addrspace(1)* %in2
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%r2 = load float addrspace(1)* %in3
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%r3 = tail call float @llvm.fma.f32(float %r0, float %r1, float %r2)
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store float %r3, float addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}fma_v2f32:
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; SI: v_fma_f32
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; SI: v_fma_f32
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; EG: MEM_RAT_{{.*}} STORE_{{.*}} [[RES:T[0-9]]].[[CHLO:[XYZW]]][[CHHI:[XYZW]]], {{T[0-9]\.[XYZW]}},
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; EG-DAG: FMA {{\*? *}}[[RES]].[[CHLO]]
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; EG-DAG: FMA {{\*? *}}[[RES]].[[CHHI]]
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define void @fma_v2f32(<2 x float> addrspace(1)* %out, <2 x float> addrspace(1)* %in1,
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<2 x float> addrspace(1)* %in2, <2 x float> addrspace(1)* %in3) {
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%r0 = load <2 x float> addrspace(1)* %in1
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%r1 = load <2 x float> addrspace(1)* %in2
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%r2 = load <2 x float> addrspace(1)* %in3
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%r3 = tail call <2 x float> @llvm.fma.v2f32(<2 x float> %r0, <2 x float> %r1, <2 x float> %r2)
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store <2 x float> %r3, <2 x float> addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}fma_v4f32:
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; SI: v_fma_f32
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; SI: v_fma_f32
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; SI: v_fma_f32
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; SI: v_fma_f32
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; EG: MEM_RAT_{{.*}} STORE_{{.*}} [[RES:T[0-9]]].{{[XYZW][XYZW][XYZW][XYZW]}}, {{T[0-9]\.[XYZW]}},
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; EG-DAG: FMA {{\*? *}}[[RES]].X
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; EG-DAG: FMA {{\*? *}}[[RES]].Y
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; EG-DAG: FMA {{\*? *}}[[RES]].Z
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; EG-DAG: FMA {{\*? *}}[[RES]].W
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define void @fma_v4f32(<4 x float> addrspace(1)* %out, <4 x float> addrspace(1)* %in1,
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<4 x float> addrspace(1)* %in2, <4 x float> addrspace(1)* %in3) {
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%r0 = load <4 x float> addrspace(1)* %in1
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%r1 = load <4 x float> addrspace(1)* %in2
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%r2 = load <4 x float> addrspace(1)* %in3
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%r3 = tail call <4 x float> @llvm.fma.v4f32(<4 x float> %r0, <4 x float> %r1, <4 x float> %r2)
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store <4 x float> %r3, <4 x float> addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: @fma_commute_mul_inline_imm_f32
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; SI: v_fma_f32 {{v[0-9]+}}, 2.0, {{v[0-9]+}}, {{v[0-9]+}}
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define void @fma_commute_mul_inline_imm_f32(float addrspace(1)* noalias %out, float addrspace(1)* noalias %in.a, float addrspace(1)* noalias %in.b) nounwind {
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%tid = tail call i32 @llvm.r600.read.tidig.x() nounwind readnone
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%in.a.gep = getelementptr float addrspace(1)* %in.a, i32 %tid
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%in.b.gep = getelementptr float addrspace(1)* %in.b, i32 %tid
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%out.gep = getelementptr float addrspace(1)* %out, i32 %tid
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%a = load float addrspace(1)* %in.a.gep, align 4
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%b = load float addrspace(1)* %in.b.gep, align 4
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%fma = call float @llvm.fma.f32(float %a, float 2.0, float %b)
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store float %fma, float addrspace(1)* %out.gep, align 4
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ret void
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}
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; FUNC-LABEL: @fma_commute_mul_s_f32
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define void @fma_commute_mul_s_f32(float addrspace(1)* noalias %out, float addrspace(1)* noalias %in.a, float addrspace(1)* noalias %in.b, float %b) nounwind {
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%tid = tail call i32 @llvm.r600.read.tidig.x() nounwind readnone
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%in.a.gep = getelementptr float addrspace(1)* %in.a, i32 %tid
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%in.b.gep = getelementptr float addrspace(1)* %in.b, i32 %tid
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%out.gep = getelementptr float addrspace(1)* %out, i32 %tid
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%a = load float addrspace(1)* %in.a.gep, align 4
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%c = load float addrspace(1)* %in.b.gep, align 4
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%fma = call float @llvm.fma.f32(float %a, float %b, float %c)
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store float %fma, float addrspace(1)* %out.gep, align 4
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ret void
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}
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