Matt Arsenault 01213b1132 R600/SI: Match integer min / max instructions ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222015 91177308-0d34-0410-b5e6-96231b3b80d8		2014-11-14 18:30:06 +00:00
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AArch64	[FastISel][AArch64] Don't bail during simple GEP instruction selection.	2014-11-13 20:50:44 +00:00
ARM	ARM: avoid duplicating branches during constant islands.	2014-11-13 17:58:51 +00:00
CPP
Generic	Revert "Revert "DI: Fold constant arguments into a single MDString""	2014-10-03 20:01:09 +00:00
Hexagon	Handle ctor/init_array initialization.	2014-11-03 14:56:05 +00:00
Inputs	Revert "Revert "DI: Fold constant arguments into a single MDString""	2014-10-03 20:01:09 +00:00
Mips	First stage of call lowering for Mips fast-isel	2014-11-13 23:37:45 +00:00
MSP430	Drop the W postfix on the 16-bit registers.	2014-09-10 06:58:14 +00:00
NVPTX	[NVPTX] Add NVPTXLowerStructArgs pass	2014-11-05 18:19:30 +00:00
PowerPC	[PowerPC] Add VSX builtins for vec_div	2014-11-14 12:10:40 +00:00
R600	R600/SI: Match integer min / max instructions	2014-11-14 18:30:06 +00:00
SPARC
SystemZ
Thumb	Improve logic that decides if its profitable to commute when some of the virtual registers involved have uses/defs chains connecting them to physical register. Fix up the tests that this change improves.	2014-11-05 06:43:02 +00:00
Thumb2	ARM: allow constpool entry to be moved to the user's block in all cases.	2014-11-13 17:58:53 +00:00
X86	[AVX512] Add 512b masked integer shift by immediate patterns.	2014-11-14 15:43:00 +00:00
XCore	Fix a bit of confusion about .set and produce more readable assembly.	2014-10-21 01:17:30 +00:00