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0225d5a3af
llvm-6502/test/CodeGen
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Rafael Espindola 0225d5a3af Extend test for better coverage. 
Without this change nothing was covering this addFrameMove:

// For 64-bit SVR4 when we have spilled CRs, the spill location
// is SP+8, not a frame-relative slot.
if (Subtarget.isSVR4ABI()
    && Subtarget.isPPC64()
    && (PPC::CR2 <= Reg && Reg <= PPC::CR4)) {
  MachineLocation CSDst(PPC::X1, 8);
  MachineLocation CSSrc(PPC::CR2);
  MMI.addFrameMove(Label, CSDst, CSSrc);
  continue;
}

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181976 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-16 03:48:50 +00:00
..
AArch64 AArch64: support literal pool access in large memory model. 2013-05-04 16:54:07 +00:00
ARM ARM ISel: Don't create illegal types during LowerMUL 2013-05-14 22:33:24 +00:00
CPP
Generic TBAA: remove !tbaa from testing cases if not used. 2013-04-30 17:52:57 +00:00
Hexagon Hexagon: Pass to replace tranfer/copy instructions into combine instruction 2013-05-14 18:54:06 +00:00
Inputs
MBlaze
Mips Patch number 2 for mips16/32 floating point interoperability stubs. 2013-05-16 02:17:42 +00:00
MSP430 DAGCombiner: Simplify inverted bit tests 2013-05-08 06:44:42 +00:00
NVPTX
PowerPC Extend test for better coverage. 2013-05-16 03:48:50 +00:00
R600 R600/SI: Add lit test coverage for the remaining patterns added recently 2013-05-14 09:53:30 +00:00
SI
SPARC Recognize sparc64 as an alias for sparcv9 triples. 2013-05-14 17:47:27 +00:00
SystemZ [SystemZ] Make use of SUBTRACT HALFWORD 2013-05-15 15:05:29 +00:00
Thumb LocalStackSlotAllocation improvements 2013-04-30 20:04:37 +00:00
Thumb2 Fix ARM FastISel tests, as a first step to enabling ARM FastISel 2013-05-14 16:26:38 +00:00
X86 Set an explicit triple for this test. 2013-05-15 22:23:21 +00:00
XCore [XCore] Fix handling of functions where only the LR is spilled. 2013-05-09 16:43:42 +00:00