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026dc223ae
Besides moving structural computations to CodeGenRegisters.cpp, this also well-defines the order of these lists: - Sub-register lists come from a pre-order traversal of the graph defined by the SubRegs lists in the .td files. - Super-register lists are topologically ordered so no register comes before any of its sub-registers. When the sub-register graph is not a tree, independent super-registers appear in numerical order. - Lists of overlapping registers are ordered according to register number. This reverses the order of the super-regs lists, but nobody was depending on that. The previous order of the overlaps lists was odd, and it may have depended on the precise behavior of std::stable_sort. The old computations are still there, but will be removed shortly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132881 91177308-0d34-0410-b5e6-96231b3b80d8 |
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.. | ||
Mangler.h | ||
SubtargetFeature.h | ||
Target.td | ||
TargetAsmBackend.h | ||
TargetAsmInfo.h | ||
TargetAsmLexer.h | ||
TargetAsmParser.h | ||
TargetCallingConv.h | ||
TargetCallingConv.td | ||
TargetData.h | ||
TargetELFWriterInfo.h | ||
TargetFrameLowering.h | ||
TargetInstrDesc.h | ||
TargetInstrInfo.h | ||
TargetInstrItineraries.h | ||
TargetIntrinsicInfo.h | ||
TargetJITInfo.h | ||
TargetLibraryInfo.h | ||
TargetLowering.h | ||
TargetLoweringObjectFile.h | ||
TargetMachine.h | ||
TargetOpcodes.h | ||
TargetOptions.h | ||
TargetRegisterInfo.h | ||
TargetRegistry.h | ||
TargetSchedule.td | ||
TargetSelect.h | ||
TargetSelectionDAG.td | ||
TargetSelectionDAGInfo.h | ||
TargetSubtarget.h |