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https://github.com/c64scene-ar/llvm-6502.git
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c9c70b1651
This currently has a noticable effect on the kernel argument loads. LDS and global loads are more problematic, I think because of how copies are currently inserted to ensure that the address is a VGPR. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214942 91177308-0d34-0410-b5e6-96231b3b80d8
46 lines
2.2 KiB
LLVM
46 lines
2.2 KiB
LLVM
; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs < %s | FileCheck %s
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; CHECK-LABEL: @main
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; CHECK: S_LOAD_DWORDX4
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; CHECK: S_LOAD_DWORDX4
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; CHECK: S_WAITCNT lgkmcnt(0)
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; CHECK: S_WAITCNT vmcnt(0)
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; CHECK: S_WAITCNT expcnt(0) lgkmcnt(0)
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define void @main(<16 x i8> addrspace(2)* inreg %arg, <16 x i8> addrspace(2)* inreg %arg1, <32 x i8> addrspace(2)* inreg %arg2, <16 x i8> addrspace(2)* inreg %arg3, <16 x i8> addrspace(2)* inreg %arg4, i32 inreg %arg5, i32 %arg6, i32 %arg7, i32 %arg8, i32 %arg9, float addrspace(2)* inreg %constptr) #0 {
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main_body:
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%tmp = getelementptr <16 x i8> addrspace(2)* %arg3, i32 0
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%tmp10 = load <16 x i8> addrspace(2)* %tmp, !tbaa !0
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%tmp11 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %tmp10, i32 0, i32 %arg6)
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%tmp12 = extractelement <4 x float> %tmp11, i32 0
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%tmp13 = extractelement <4 x float> %tmp11, i32 1
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call void @llvm.AMDGPU.barrier.global() #1
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%tmp14 = extractelement <4 x float> %tmp11, i32 2
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; %tmp15 = extractelement <4 x float> %tmp11, i32 3
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%tmp15 = load float addrspace(2)* %constptr, align 4 ; Force waiting for expcnt and lgkmcnt
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%tmp16 = getelementptr <16 x i8> addrspace(2)* %arg3, i32 1
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%tmp17 = load <16 x i8> addrspace(2)* %tmp16, !tbaa !0
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%tmp18 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %tmp17, i32 0, i32 %arg6)
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%tmp19 = extractelement <4 x float> %tmp18, i32 0
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%tmp20 = extractelement <4 x float> %tmp18, i32 1
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%tmp21 = extractelement <4 x float> %tmp18, i32 2
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%tmp22 = extractelement <4 x float> %tmp18, i32 3
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call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %tmp19, float %tmp20, float %tmp21, float %tmp22)
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call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %tmp12, float %tmp13, float %tmp14, float %tmp15)
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ret void
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}
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; Function Attrs: noduplicate nounwind
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declare void @llvm.AMDGPU.barrier.global() #1
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; Function Attrs: nounwind readnone
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declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #2
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declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
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attributes #0 = { "ShaderType"="1" }
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attributes #1 = { noduplicate nounwind }
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attributes #2 = { nounwind readnone }
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!0 = metadata !{metadata !1, metadata !1, i64 0, i32 1}
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!1 = metadata !{metadata !"const", null}
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