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fe6bd52bf2
Summary: Correct the match patterns and the lowerings that made the CodeGen tests pass despite the mistakes. The original testcase that discovered the problem was SingleSource/UnitTests/SignlessType/factor.c in test-suite. During review, we also found that some of the existing CodeGen tests were incorrect and fixed them: * bitwise.ll: In bsel_v16i8 the IfSet/IfClear were reversed because bsel and bmnz have different operand orders and the test didn't correctly account for this. bmnz goes 'IfClear, IfSet, CondMask', while bsel goes 'CondMask, IfClear, IfSet'. * vec.ll: In the cases where a bsel is emitted as a bmnz (they are the same operation with a different input tied to the result) the operands were in the wrong order. * compare.ll and compare_float.ll: The bsel operand order was correct for a greater-than comparison, but a greater-than comparison instruction doesn't exist. Lowering this operation inverts the condition so the IfSet/IfClear need to be swapped to match. The differences between BSEL, BMNZ, and BMZ and how they map to/from vselect are rather confusing. I've therefore added a note to MSA.txt to explain this in a single place in addition to the comments that explain each case. Reviewers: matheusalmeida, jacksprat Reviewed By: matheusalmeida Differential Revision: http://llvm-reviews.chandlerc.com/D3028 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203657 91177308-0d34-0410-b5e6-96231b3b80d8 |
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.. | ||
2r_vector_scalar.ll | ||
2r.ll | ||
2rf_exup.ll | ||
2rf_float_int.ll | ||
2rf_fq.ll | ||
2rf_int_float.ll | ||
2rf_tq.ll | ||
2rf.ll | ||
3r_4r_widen.ll | ||
3r_4r.ll | ||
3r_splat.ll | ||
3r-a.ll | ||
3r-b.ll | ||
3r-c.ll | ||
3r-d.ll | ||
3r-i.ll | ||
3r-m.ll | ||
3r-p.ll | ||
3r-s.ll | ||
3r-v.ll | ||
3rf_4rf_q.ll | ||
3rf_4rf.ll | ||
3rf_exdo.ll | ||
3rf_float_int.ll | ||
3rf_int_float.ll | ||
3rf_q.ll | ||
3rf.ll | ||
arithmetic_float.ll | ||
arithmetic.ll | ||
basic_operations_float.ll | ||
basic_operations.ll | ||
bit.ll | ||
bitcast.ll | ||
bitwise.ll | ||
compare_float.ll | ||
compare.ll | ||
elm_copy.ll | ||
elm_cxcmsa.ll | ||
elm_insv.ll | ||
elm_move.ll | ||
elm_shift_slide.ll | ||
endian.ll | ||
frameindex.ll | ||
i5_ld_st.ll | ||
i5-a.ll | ||
i5-b.ll | ||
i5-c.ll | ||
i5-m.ll | ||
i5-s.ll | ||
i8.ll | ||
i10.ll | ||
inline-asm.ll | ||
llvm-stress-s449609655-simplified.ll | ||
llvm-stress-s525530439.ll | ||
llvm-stress-s997348632.ll | ||
llvm-stress-s1704963983.ll | ||
llvm-stress-s1935737938.ll | ||
llvm-stress-s2090927243-simplified.ll | ||
llvm-stress-s2501752154-simplified.ll | ||
llvm-stress-s2704903805.ll | ||
llvm-stress-s3861334421.ll | ||
llvm-stress-s3926023935.ll | ||
llvm-stress-s3997499501.ll | ||
llvm-stress-sz1-s742806235.ll | ||
shift-dagcombine.ll | ||
shuffle.ll | ||
special.ll | ||
spill.ll | ||
vec.ll | ||
vecs10.ll |