mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-21 00:32:23 +00:00
9e2838e29b
Like GCC, this re-uses the 'f' constraint and a new 'w' print-modifier:
asm ("ldi.w %w0, 1", "=f"(result));
Unlike GCC, the 'w' print-modifer is not _required_ to produce the intended
output. This is a consequence of differences in the internal handling of
the registers in each compiler. To be source-compatible between the
compilers, users must use the 'w' print-modifier.
MSA registers (including control registers) are supported in clobber lists.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194476 91177308-0d34-0410-b5e6-96231b3b80d8
35 lines
962 B
LLVM
35 lines
962 B
LLVM
; A basic inline assembly test
|
|
|
|
; RUN: llc -march=mips -mattr=+msa,+fp64 < %s | FileCheck %s
|
|
|
|
@v4i32_r = global <4 x i32> zeroinitializer, align 16
|
|
|
|
define void @test1() nounwind {
|
|
entry:
|
|
; CHECK-LABEL: test1:
|
|
%0 = call <4 x i32> asm "ldi.w ${0:w}, 1", "=f"()
|
|
; CHECK: ldi.w $w{{[1-3]?[0-9]}}, 1
|
|
store <4 x i32> %0, <4 x i32>* @v4i32_r
|
|
ret void
|
|
}
|
|
|
|
define void @test2() nounwind {
|
|
entry:
|
|
; CHECK-LABEL: test2:
|
|
%0 = load <4 x i32>* @v4i32_r
|
|
%1 = call <4 x i32> asm "addvi.w ${0:w}, ${1:w}, 1", "=f,f"(<4 x i32> %0)
|
|
; CHECK: addvi.w $w{{[1-3]?[0-9]}}, $w{{[1-3]?[0-9]}}, 1
|
|
store <4 x i32> %1, <4 x i32>* @v4i32_r
|
|
ret void
|
|
}
|
|
|
|
define void @test3() nounwind {
|
|
entry:
|
|
; CHECK-LABEL: test3:
|
|
%0 = load <4 x i32>* @v4i32_r
|
|
%1 = call <4 x i32> asm sideeffect "addvi.w ${0:w}, ${1:w}, 1", "=f,f,~{$w0}"(<4 x i32> %0)
|
|
; CHECK: addvi.w $w{{([1-9]|[1-3][0-9])}}, $w{{([1-9]|[1-3][0-9])}}, 1
|
|
store <4 x i32> %1, <4 x i32>* @v4i32_r
|
|
ret void
|
|
}
|