llvm-6502/test/CodeGen/Thumb2/thumb2-rsb2.ll
Joerg Sonnenberger aca2998f14 Enabling thumb2 mode used to force support for armv6t2. Replace this
with a temporary assertion and adjust the various test cases.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197224 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-13 11:16:00 +00:00

42 lines
838 B
LLVM

; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
; 171 = 0x000000ab
define i32 @f1(i32 %a) {
%tmp = sub i32 171, %a
ret i32 %tmp
}
; CHECK-LABEL: f1:
; CHECK: rsb.w r0, r0, #171
; 1179666 = 0x00120012
define i32 @f2(i32 %a) {
%tmp = sub i32 1179666, %a
ret i32 %tmp
}
; CHECK-LABEL: f2:
; CHECK: rsb.w r0, r0, #1179666
; 872428544 = 0x34003400
define i32 @f3(i32 %a) {
%tmp = sub i32 872428544, %a
ret i32 %tmp
}
; CHECK-LABEL: f3:
; CHECK: rsb.w r0, r0, #872428544
; 1448498774 = 0x56565656
define i32 @f4(i32 %a) {
%tmp = sub i32 1448498774, %a
ret i32 %tmp
}
; CHECK-LABEL: f4:
; CHECK: rsb.w r0, r0, #1448498774
; 66846720 = 0x03fc0000
define i32 @f5(i32 %a) {
%tmp = sub i32 66846720, %a
ret i32 %tmp
}
; CHECK-LABEL: f5:
; CHECK: rsb.w r0, r0, #66846720