Hal Finkel 033e0a94cb Don't crash in SE dealing with ashr x, -1 ... ScalarEvolution::getSignedRange uses ComputeNumSignBits from ValueTracking on ashr instructions. ComputeNumSignBits can return zero, but this case was not handled correctly by the code in getSignedRange which was calling: APInt::getSignedMinValue(BitWidth).ashr(NS - 1) with NS = 0, resulting in an assertion failure in APInt::ashr. Now, we just return the conservative result (as with NS == 1). Another bug found by llvm-stress. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185955 91177308-0d34-0410-b5e6-96231b3b80d8		2013-07-09 18:16:16 +00:00
..
AArch64	AArch64: correct CodeGen of MOVZ/MOVK combinations.	2013-07-01 19:23:10 +00:00
ARM	Add a comment to this change, requested by Eric Christopher.	2013-07-08 19:52:51 +00:00
CPP
Generic	Debug Info: clean up usage of Verify.	2013-06-28 05:43:10 +00:00
Hexagon
Inputs
MBlaze
Mips	[mips] Fix test case to check that mips64 instructions are generated.	2013-07-01 20:18:58 +00:00
MSP430	Really fix the test. Sorry for the breakage...	2013-07-01 19:51:36 +00:00
NVPTX	[NVPTX] Add support for module-scope inline asm	2013-07-01 13:00:14 +00:00
PowerPC	Don't crash in SE dealing with ashr x, -1	2013-07-09 18:16:16 +00:00
R600	R600: Do not predicated basic block with multiple alu clause	2013-07-09 15:03:33 +00:00
SI
SPARC
SystemZ	[SystemZ] Use MVC for simple load/store pairs	2013-07-09 09:46:39 +00:00
Thumb
Thumb2	ARM: allow predicated barriers in Thumb mode	2013-06-26 16:52:32 +00:00
X86	Revert r185872 - "Stop emitting weak symbols into the "coal" sections"	2013-07-09 10:00:16 +00:00
XCore	[XCore] Add ISel pattern for LDWCP	2013-07-03 07:48:50 +00:00