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f2cfef8172
Test is not included as it is several 1000 lines long. To test this functionnality, a test case must generate at least 2 ALU clauses, where an ALU clause is ~110 instructions long. NOTE: This is a candidate for the stable branch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185943 91177308-0d34-0410-b5e6-96231b3b80d8 |
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| .. | ||
| 128bit-kernel-args.ll | ||
| add.ll | ||
| and.ll | ||
| bfe_uint.ll | ||
| bfi_int.ll | ||
| call_fs.ll | ||
| cf_end.ll | ||
| dagcombiner-bug-illegal-vec4-int-to-fp.ll | ||
| disconnected-predset-break-bug.ll | ||
| dot4-folding.ll | ||
| elf.ll | ||
| elf.r600.ll | ||
| fabs.ll | ||
| fadd.ll | ||
| fcmp-cnd.ll | ||
| fcmp-cnde-int-args.ll | ||
| fcmp.ll | ||
| fdiv.ll | ||
| fetch-limits.r600.ll | ||
| fetch-limits.r700+.ll | ||
| floor.ll | ||
| fmad.ll | ||
| fmax.ll | ||
| fmin.ll | ||
| fmul.ll | ||
| fmul.v4f32.ll | ||
| fp_to_sint.ll | ||
| fp_to_uint.ll | ||
| fsub.ll | ||
| i8-to-double-to-float.ll | ||
| icmp-select-sete-reverse-args.ll | ||
| imm.ll | ||
| indirect-addressing.ll | ||
| jump-address.ll | ||
| kcache-fold.ll | ||
| legalizedag-bug-expand-setcc.ll | ||
| lit.local.cfg | ||
| literals.ll | ||
| llvm.AMDGPU.barrier.local.ll | ||
| llvm.AMDGPU.cube.ll | ||
| llvm.AMDGPU.imax.ll | ||
| llvm.AMDGPU.imin.ll | ||
| llvm.AMDGPU.mul.ll | ||
| llvm.AMDGPU.tex.ll | ||
| llvm.AMDGPU.trunc.ll | ||
| llvm.AMDGPU.umax.ll | ||
| llvm.AMDGPU.umin.ll | ||
| llvm.cos.ll | ||
| llvm.pow.ll | ||
| llvm.SI.fs.interp.constant.ll | ||
| llvm.SI.imageload.ll | ||
| llvm.SI.resinfo.ll | ||
| llvm.SI.sample.ll | ||
| llvm.sin.ll | ||
| load-input-fold.ll | ||
| load.ll | ||
| load.vec.ll | ||
| local-memory.ll | ||
| loop-address.ll | ||
| lshl.ll | ||
| lshr.ll | ||
| mul.ll | ||
| mulhu.ll | ||
| or.ll | ||
| packetizer.ll | ||
| predicates.ll | ||
| pv-packing.ll | ||
| pv.ll | ||
| r600-encoding.ll | ||
| README | ||
| reciprocal.ll | ||
| rotr.ll | ||
| rv7x0_count3.ll | ||
| schedule-fs-loop-nested-if.ll | ||
| schedule-fs-loop-nested.ll | ||
| schedule-fs-loop.ll | ||
| schedule-if-2.ll | ||
| schedule-if.ll | ||
| schedule-vs-if-nested-loop.ll | ||
| sdiv.ll | ||
| selectcc-cnd.ll | ||
| selectcc-cnde-int.ll | ||
| selectcc-icmp-select-float.ll | ||
| selectcc-opt.ll | ||
| set-dx10.ll | ||
| setcc.ll | ||
| seto.ll | ||
| setuo.ll | ||
| shl.ll | ||
| short-args.ll | ||
| sign_extend.ll | ||
| sint_to_fp.ll | ||
| sra.ll | ||
| srl.ll | ||
| store.ll | ||
| store.r600.ll | ||
| sub.ll | ||
| swizzle-export.ll | ||
| tex-clause-antidep.ll | ||
| texture-input-merge.ll | ||
| udiv.ll | ||
| uint_to_fp.ll | ||
| uitofp.ll | ||
| unsupported-cc.ll | ||
| urecip.ll | ||
| urem.ll | ||
| vertex-fetch-encoding.ll | ||
| vselect.ll | ||
| vtx-schedule.ll | ||
| work-item-intrinsics.ll | ||
| xor.ll | ||
+==============================================================================+
| How to organize the lit tests |
+==============================================================================+
- If you write a test for matching a single DAG opcode or intrinsic, it should
go in a file called {opcode_name,intrinsic_name}.ll (e.g. fadd.ll)
- If you write a test that matches several DAG opcodes and checks for a single
ISA instruction, then that test should go in a file called {ISA_name}.ll (e.g.
bfi_int.ll
- For all other tests, use your best judgement for organizing tests and naming
the files.
+==============================================================================+
| Naming conventions |
+==============================================================================+
- Use dash '-' and not underscore '_' to separate words in file names, unless
the file is named after a DAG opcode or ISA instruction that has an
underscore '_' in its name.