Bruno Cardoso Lopes 045573ce21 Add AVX matching patterns to Packed Bit Test intrinsics.
Apply the same approach of SSE4.1 ptest intrinsics but
create a new x86 node "testp" since AVX introduces
vtest{ps}{pd} instructions which set ZF and CF depending
on sign bit AND and ANDN of packed floating-point sources.

This is slightly different from what the "ptest" does.
Tests comming with the other 256 intrinsics tests.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110744 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-10 23:25:42 +00:00
2010-08-09 20:33:20 +00:00
2010-07-16 06:33:36 +00:00
2010-04-16 13:32:55 +00:00
2010-08-08 09:20:39 +00:00
2010-07-27 00:04:55 +00:00

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