llvm-6502

mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-01-28 21:34:23 +00:00

History

Bruno Cardoso Lopes 045573ce21 Add AVX matching patterns to Packed Bit Test intrinsics.

Apply the same approach of SSE4.1 ptest intrinsics but
create a new x86 node "testp" since AVX introduces
vtest{ps}{pd} instructions which set ZF and CF depending
on sign bit AND and ANDN of packed floating-point sources.

This is slightly different from what the "ptest" does.
Tests comming with the other 256 intrinsics tests.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110744 91177308-0d34-0410-b5e6-96231b3b80d8

2010-08-10 23:25:42 +00:00

Analysis

Now that we're using ConstantRange to represent potential values, make use of that represenation to

2010-08-10 23:20:01 +00:00