llvm-6502/test/CodeGen
Bob Wilson 05646099a0 Change ARMGlobalMerge to keep BSS globals in separate pools.
This completes the fixes for Radar 8673120.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119566 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-17 21:25:39 +00:00
..
Alpha
ARM Change ARMGlobalMerge to keep BSS globals in separate pools. 2010-11-17 21:25:39 +00:00
Blackfin
CBackend
CellSPU Fix memory access lowering on SPU, adding 2010-11-12 10:14:03 +00:00
CPP
Generic Emacs auto-fill bug. 2010-11-12 18:17:46 +00:00
MBlaze Recommit 116986 with capitalization typo fixed. 2010-10-21 03:57:26 +00:00
Mips Enable mips32 mul instruction. Patch by Akira Hatanaka <ahatanaka@mips.com> 2010-11-12 00:38:32 +00:00
MSP430 Inline asm mult-alt constraint tests. 2010-11-02 23:01:44 +00:00
PowerPC remove a pointless testcase. 2010-11-15 05:07:03 +00:00
PTX Add simple arithmetics and %type directive for PTX 2010-11-17 08:08:49 +00:00
SPARC Inline asm mult-alt constraint tests. 2010-11-02 23:01:44 +00:00
SystemZ
Thumb Do not use MEMBARRIER_MCR for any Thumb code. 2010-11-09 22:50:44 +00:00
Thumb2 Remove ARM isel hacks that fold large immediates into a pair of add, sub, and, 2010-11-17 20:13:28 +00:00
X86 Recognise 32-bit ror-based bswap implementation used by uclibc 2010-11-13 19:54:30 +00:00
XCore Enable machine sinking critical edge splitting. e.g. 2010-09-20 22:52:00 +00:00
thumb2-mul.ll Enable target-specific mul-lowering on ARM, even at -Os. Remove a test that this makes 2010-09-21 22:51:46 +00:00