Tom Stellard 056a34916a R600: Don't promote i64 stores to v2i32 during DAG legalization ... We take care of this during instruction selection now. This fixes a potential infinite loop when lowering misaligned stores. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228188 91177308-0d34-0410-b5e6-96231b3b80d8		2015-02-04 20:49:49 +00:00
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AArch64	MachineCSE: Clear dead-def flag on CSE.	2015-02-04 19:35:16 +00:00
ARM	Adding support to LLVM for targeting Cortex-A72	2015-02-04 13:31:29 +00:00
BPF
CPP
Generic
Hexagon	[Hexagon] Adding encoding information for absolute-reg mode stores. Xfailing a test until constant extenders are correctly put in the same packet.	2015-02-04 17:52:06 +00:00
Inputs
Mips	[mips][microMIPS] Implement CodeGen support for SW16 and LW16 instructions	2015-02-04 15:43:17 +00:00
MSP430
NVPTX
PowerPC	Add missing test case from r228046	2015-02-04 20:00:04 +00:00
R600	R600: Don't promote i64 stores to v2i32 during DAG legalization	2015-02-04 20:49:49 +00:00
SPARC
SystemZ
Thumb
Thumb2
X86	Fixes a bug in vector load legalization that confused bits and bytes.	2015-02-04 18:54:01 +00:00
XCore