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05e61f7113
llvm-6502/test/CodeGen
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Elena Demikhovsky 05e61f7113 X86: optimized i64 vector multiply with constant 
When we multiply two 64-bit vectors, we extract lower and upper part and use the PMULUDQ instruction.
When one of the operands is a constant, the upper part may be zero, we know this at compile time.
Example: %a = mul <4 x i64> %b, <4 x i64> < i64 5, i64 5, i64 5, i64 5>.
I'm checking the value of the upper part and prevent redundant "multiply", "shift" and "add" operations.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239802 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-16 06:07:24 +00:00
..
AArch64 [AArch64] Generalize extract-high DUP extension to MOVI/MVNI. 2015-06-16 01:18:14 +00:00
AMDGPU R600 -> AMDGPU rename 2015-06-13 03:28:10 +00:00
ARM [ARM] Disabling vfp4 should disable fp16 2015-06-12 09:38:51 +00:00
BPF [bpf] rename triple names bpf_be -> bpfeb 2015-06-05 16:11:14 +00:00
CPP
Generic Resubmit r237954 (MIR Serialization: print and parse LLVM IR using MIR format). 2015-05-27 18:02:19 +00:00
Hexagon [Hexagon] Using readobj rather than objdump. 2015-06-15 21:57:41 +00:00
Inputs IR: Give 'DI' prefix to debug info metadata 2015-04-29 16:38:44 +00:00
Mips [mips] Make TTypeEncoding indirect to allow .eh_frame to be read-only. 2015-06-02 20:32:50 +00:00
MIR MIR Serialization: Print and parse simple machine function attributes. 2015-06-16 00:10:47 +00:00
MSP430
NVPTX Revert 239795 2015-06-16 01:20:53 +00:00
PowerPC LLVM support for vector quad bit permute and gather instructions through builtins 2015-06-11 06:21:25 +00:00
SPARC Add support for the Sparc implementation-defined "ASR" registers. 2015-05-18 16:29:48 +00:00
SystemZ [DAGCombiner] Account for getVectorIdxTy() when narrowing vector load 2015-05-05 19:34:10 +00:00
Thumb Revert r238473, "Thumb2: Modify codegen for memcpy intrinsic to prefer LDM/STM." 2015-06-05 18:01:28 +00:00
Thumb2 ARM: Thumb2 LDRD/STRD supports independent input/output regs 2015-06-03 16:30:24 +00:00
WinEH [WinEH] C++ EH state numbering fixes 2015-05-20 23:22:24 +00:00
X86 X86: optimized i64 vector multiply with constant 2015-06-16 06:07:24 +00:00
XCore IR: Give 'DI' prefix to debug info metadata 2015-04-29 16:38:44 +00:00