llvm-6502/test
Evan Cheng ee9e1b0a85 On some targets, non-move instructions can become move instructions because of coalescing. e.g.
vr2 = OR vr0, vr1
=>
vr2 = OR vr1, vr1   // after coalescing vr0 with vr1

Update the value# of the destination register with the copy instruction if that happens.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56165 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-12 18:13:14 +00:00
..
Analysis Correct callgraph construction. It has two problems: 2008-09-09 12:40:47 +00:00
Archive
Assembler Temporarily disable vector select in the bitcode reader. The 2008-09-09 02:08:49 +00:00
Bindings/Ocaml PR2731: C and Ocaml bindings for setTailCall and isTailCall. 2008-08-30 16:34:54 +00:00
Bitcode
BugPoint
CodeGen On some targets, non-move instructions can become move instructions because of coalescing. e.g. 2008-09-12 18:13:14 +00:00
DebugInfo
ExecutionEngine
Feature
FrontendAda
FrontendC Prevent our own passes from promoting this to 2008-09-05 21:34:32 +00:00
FrontendC++
FrontendFortran
FrontendObjC
FrontendObjC++
Integer
lib
Linker
LLVMC
Other
Scripts
TableGen
Transforms On 64-bit targets, change 32-bit getelementptr indices to be 64-bit 2008-09-11 23:06:38 +00:00
Verifier
Makefile
Makefile.tests
TestRunner.sh