llvm-6502/test/CodeGen
Evan Cheng ee9e1b0a85 On some targets, non-move instructions can become move instructions because of coalescing. e.g.
vr2 = OR vr0, vr1
=>
vr2 = OR vr1, vr1   // after coalescing vr0 with vr1

Update the value# of the destination register with the copy instruction if that happens.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56165 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-12 18:13:14 +00:00
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Alpha
ARM
CBackend
CellSPU
CPP
Generic
IA64
Mips
PowerPC On some targets, non-move instructions can become move instructions because of coalescing. e.g. 2008-09-12 18:13:14 +00:00
SPARC
X86 Add indirect tail call (function pointer) examples. 2008-09-11 22:24:28 +00:00