Daniel Sanders 06426f54cb [mips] Support 16-bit offsets for 'm' inline assembly memory constraint. ...

Reviewers: vkalintiris

Reviewed By: vkalintiris

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D8435

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233086 91177308-0d34-0410-b5e6-96231b3b80d8

2015-03-24 15:19:14 +00:00

..

AArch64

[AArch64, ARM] Enable GlobalMerge with -O3 rather than -O1.

2015-03-23 21:17:36 +00:00

ARM

[AArch64, ARM] Enable GlobalMerge with -O3 rather than -O1.

2015-03-23 21:17:36 +00:00

BPF

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CPP

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Generic

Unxfail test/CodeGen/Generic/vector.ll now passing on Hexagon

2015-03-19 20:22:17 +00:00

Hexagon

[Hexagon] Add support for vector instructions

2015-03-19 16:33:08 +00:00

Inputs

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Mips

[mips] Support 16-bit offsets for 'm' inline assembly memory constraint.

2015-03-24 15:19:14 +00:00

MSP430

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NVPTX

Add support for __nvvm_reflect changes in libdevice in CUDA-7.0

2015-03-19 17:05:35 +00:00

PowerPC

[SDAG] Don't widen VSETCC during type legalization for split operands

2015-03-23 08:22:43 +00:00

R600

R600/SI: Select V_BFE_U32 for and+shift with a non-literal offset

2015-03-24 13:40:34 +00:00

SPARC

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SystemZ

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Thumb

[ARM] Fix handling of thumb1 out-of-range frame offsets

2015-03-20 17:20:07 +00:00

Thumb2

Fix a nasty bug in DAGCombine of STORE nodes.

2015-03-19 22:48:57 +00:00

WinEH

Fixing a bug with WinEH PHI handling

2015-03-20 21:42:54 +00:00

X86

[SelectionDAG] Fixed issue with uitofp vector constant folding being treated as sitofp

2015-03-23 22:44:55 +00:00

XCore

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