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0832a72a662043efad72f090023a19156974fc0c
llvm-6502/test/CodeGen
History
Michael Liao 0832a72a66 Add MULX code generation support
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164673 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-26 08:22:37 +00:00
..
ARM
Generate an error message instead of asserting or segfaulting when we have a
2012-09-26 06:16:18 +00:00
CellSPU
Add test triples to fix win32 failures. Revert workaround from r161292.
2012-08-08 20:31:37 +00:00
CPP
…
Generic
BranchProb: modify the definition of an edge in BranchProbabilityInfo to handle
2012-08-24 18:14:27 +00:00
Hexagon
LLVM Bug Fix 13709: Remove needless lsr(Rp, #32) instruction access the
2012-09-05 16:01:40 +00:00
MBlaze
…
Mips
Handled unaligned load/stores properly in Mips16
2012-09-15 01:02:03 +00:00
MSP430
Reapply r161633-161634 "Partition use lists so defs always come before uses.""
2012-08-10 00:21:30 +00:00
NVPTX
…
PowerPC
Specify MachinePointerInfo as refering to the argument value and offset of the
2012-09-24 20:47:19 +00:00
SPARC
Move load_to_switch.ll to test/CodeGen/SPARC/
2012-09-19 09:25:03 +00:00
Thumb
Fix Thumb2 fixup kind in the integrated-as.
2012-09-01 15:06:36 +00:00
Thumb2
Use vld1 / vst2 for unaligned v2f64 load / store. e.g. Use vld1.16 for 2-byte
2012-09-18 01:42:45 +00:00
X86
Add MULX code generation support
2012-09-26 08:22:37 +00:00
XCore
…
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