Tom Stellard c4a246996d R600: Fix R600ControlFlowFinalizer not considering VTX_READ 128 bit dst reg ... Patch by: Vincent Lejeune https://bugs.freedesktop.org/show_bug.cgi?id=64877 NOTE: This is a candidate for the 3.3 branch. Merged from r182600 Author: Tom Stellard <thomas.stellard@amd.com> Date: Thu May 23 18:26:42 2013 +0000 git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_33@185868 91177308-0d34-0410-b5e6-96231b3b80d8		2013-07-08 21:20:22 +00:00
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AArch64	AArch64: support literal pool access in large memory model.	2013-05-04 16:54:07 +00:00
ARM	Merging r181842:	2013-05-15 23:41:52 +00:00
CPP
Generic	Merging r182387:	2013-05-21 20:23:13 +00:00
Hexagon	Hexagon - Add peephole optimizations for zero extends.	2013-05-02 20:22:51 +00:00
Inputs
MBlaze
Mips	Remove some uneeded pseudos in the presence of the naked function attribute.	2013-05-03 23:17:24 +00:00
MSP430
NVPTX	Merging r182394:	2013-05-29 06:56:17 +00:00
PowerPC	Merging r181800:	2013-05-14 18:34:27 +00:00
R600	R600: Fix R600ControlFlowFinalizer not considering VTX_READ 128 bit dst reg	2013-07-08 21:20:22 +00:00
SI
SPARC
SystemZ	[SystemZ] Add CodeGen test cases	2013-05-06 16:17:29 +00:00
Thumb
Thumb2
X86	Merging r182486:	2013-05-22 17:23:54 +00:00
XCore