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set, these flags indicate the instructions source / def operands have special register allocation requirement that are not captured in their register classes. Post-allocation passes (e.g. post-alloc scheduler) should not change their allocations. e.g. ARM::LDRD require the two definitions to be allocated even / odd register pair. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83196 91177308-0d34-0410-b5e6-96231b3b80d8 |
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.. | ||
AsmMatcherEmitter.cpp | ||
AsmMatcherEmitter.h | ||
AsmWriterEmitter.cpp | ||
AsmWriterEmitter.h | ||
CallingConvEmitter.cpp | ||
CallingConvEmitter.h | ||
ClangDiagnosticsEmitter.cpp | ||
ClangDiagnosticsEmitter.h | ||
CMakeLists.txt | ||
CodeEmitterGen.cpp | ||
CodeEmitterGen.h | ||
CodeGenDAGPatterns.cpp | ||
CodeGenDAGPatterns.h | ||
CodeGenInstruction.cpp | ||
CodeGenInstruction.h | ||
CodeGenIntrinsics.h | ||
CodeGenRegisters.h | ||
CodeGenTarget.cpp | ||
CodeGenTarget.h | ||
DAGISelEmitter.cpp | ||
DAGISelEmitter.h | ||
FastISelEmitter.cpp | ||
FastISelEmitter.h | ||
InstrEnumEmitter.cpp | ||
InstrEnumEmitter.h | ||
InstrInfoEmitter.cpp | ||
InstrInfoEmitter.h | ||
IntrinsicEmitter.cpp | ||
IntrinsicEmitter.h | ||
LLVMCConfigurationEmitter.cpp | ||
LLVMCConfigurationEmitter.h | ||
Makefile | ||
Record.cpp | ||
Record.h | ||
RegisterInfoEmitter.cpp | ||
RegisterInfoEmitter.h | ||
StringToOffsetTable.h | ||
SubtargetEmitter.cpp | ||
SubtargetEmitter.h | ||
TableGen.cpp | ||
TableGenBackend.cpp | ||
TableGenBackend.h | ||
TGLexer.cpp | ||
TGLexer.h | ||
TGParser.cpp | ||
TGParser.h | ||
TGValueTypes.cpp |