llvm-6502/test/CodeGen
Tim Northover 0a088b1fc5 ARM64: print correct aliases for NEON mov & mvn instructions
In all cases, if a "mov" alias exists, it is the canonical form of the
instruction. Now that TableGen can support aliases containing syntax variants,
we can enable them and improve the quality of the asm output.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208874 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-15 12:11:02 +00:00
..
AArch64 ARM64: print correct aliases for NEON mov & mvn instructions 2014-05-15 12:11:02 +00:00
ARM Rename ComputeMaskedBits to computeKnownBits. "Masked" has been 2014-05-14 21:14:37 +00:00
ARM64 ARM64: print correct aliases for NEON mov & mvn instructions 2014-05-15 12:11:02 +00:00
CPP
Generic
Hexagon DebugInfo: Sure up subprogram variable list handling with more assertions and fewer conditionals. 2014-05-14 21:52:46 +00:00
Inputs
Mips Allow sret on the second parameter as well as the first 2014-05-09 22:32:13 +00:00
MSP430
NVPTX
PowerPC DebugInfo: Sure up subprogram variable list handling with more assertions and fewer conditionals. 2014-05-14 21:52:46 +00:00
R600 Rename ComputeMaskedBits to computeKnownBits. "Masked" has been 2014-05-14 21:14:37 +00:00
SPARC Allow sret on the second parameter as well as the first 2014-05-09 22:32:13 +00:00
SystemZ
Thumb
Thumb2 Move the segmented stack switch to a function attribute 2014-04-10 22:58:43 +00:00
X86 Rename ComputeMaskedBits to computeKnownBits. "Masked" has been 2014-05-14 21:14:37 +00:00
XCore