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https://github.com/c64scene-ar/llvm-6502.git
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1ccffdf27f
machine. Includes a fix for a subtarget initialization for hard floating point on mips16. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212240 91177308-0d34-0410-b5e6-96231b3b80d8
97 lines
3.2 KiB
C++
97 lines
3.2 KiB
C++
//===-- MipsTargetMachine.h - Define TargetMachine for Mips -----*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file declares the Mips specific subclass of TargetMachine.
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//
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//===----------------------------------------------------------------------===//
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#ifndef MIPSTARGETMACHINE_H
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#define MIPSTARGETMACHINE_H
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#include "MipsSubtarget.h"
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#include "llvm/CodeGen/Passes.h"
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#include "llvm/CodeGen/SelectionDAGISel.h"
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#include "llvm/Target/TargetFrameLowering.h"
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#include "llvm/Target/TargetMachine.h"
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namespace llvm {
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class formatted_raw_ostream;
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class MipsRegisterInfo;
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class MipsTargetMachine : public LLVMTargetMachine {
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MipsSubtarget Subtarget;
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public:
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MipsTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS,
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const TargetOptions &Options, Reloc::Model RM,
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CodeModel::Model CM, CodeGenOpt::Level OL, bool isLittle);
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virtual ~MipsTargetMachine() {}
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void addAnalysisPasses(PassManagerBase &PM) override;
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const MipsInstrInfo *getInstrInfo() const override {
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return getSubtargetImpl()->getInstrInfo();
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}
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const TargetFrameLowering *getFrameLowering() const override {
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return getSubtargetImpl()->getFrameLowering();
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}
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const MipsSubtarget *getSubtargetImpl() const override { return &Subtarget; }
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const InstrItineraryData *getInstrItineraryData() const override {
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return Subtarget.inMips16Mode()
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? nullptr
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: &getSubtargetImpl()->getInstrItineraryData();
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}
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MipsJITInfo *getJITInfo() override {
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return Subtarget.getJITInfo();
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}
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const MipsRegisterInfo *getRegisterInfo() const override {
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return getSubtargetImpl()->getRegisterInfo();
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}
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const MipsTargetLowering *getTargetLowering() const override {
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return getSubtargetImpl()->getTargetLowering();
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}
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const DataLayout *getDataLayout() const override {
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return getSubtargetImpl()->getDataLayout();
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}
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const MipsSelectionDAGInfo* getSelectionDAGInfo() const override {
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return getSubtargetImpl()->getSelectionDAGInfo();
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}
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// Pass Pipeline Configuration
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TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
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bool addCodeEmitter(PassManagerBase &PM, JITCodeEmitter &JCE) override;
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};
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/// MipsebTargetMachine - Mips32/64 big endian target machine.
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///
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class MipsebTargetMachine : public MipsTargetMachine {
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virtual void anchor();
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public:
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MipsebTargetMachine(const Target &T, StringRef TT,
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StringRef CPU, StringRef FS, const TargetOptions &Options,
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Reloc::Model RM, CodeModel::Model CM,
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CodeGenOpt::Level OL);
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};
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/// MipselTargetMachine - Mips32/64 little endian target machine.
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///
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class MipselTargetMachine : public MipsTargetMachine {
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virtual void anchor();
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public:
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MipselTargetMachine(const Target &T, StringRef TT,
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StringRef CPU, StringRef FS, const TargetOptions &Options,
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Reloc::Model RM, CodeModel::Model CM,
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CodeGenOpt::Level OL);
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};
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} // End llvm namespace
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#endif
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