llvm-6502/test/MC
Jozef Kolek 617b574ffb [mips][microMIPS] MicroMIPS 16-bit unconditional branch instruction B
Implement microMIPS 16-bit unconditional branch instruction B.

Implemented 16-bit microMIPS unconditional instruction has real name B16, and
B is an alias which expands to either B16 or BEQ according to the rules:
b 256 --> b16 256 # R_MICROMIPS_PC10_S1
b 12256 --> beq $zero, $zero, 12256 # R_MICROMIPS_PC16_S1
b label --> beq $zero, $zero, label # R_MICROMIPS_PC16_S1

Differential Revision: http://reviews.llvm.org/D3514


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226577 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-20 16:45:27 +00:00
..
AArch64 Update AArch64 ELF relocations to ABI 1.0 2014-11-26 10:49:18 +00:00
ARM [ARM] SSAT/USAT with an 'asr #32' shift should result in an undefined encoding rather than unpredictable 2015-01-19 16:37:17 +00:00
AsmParser MC: Don't emit .no_dead_strip on targets which don't support it 2014-12-24 04:11:42 +00:00
COFF Bring r226038 back. 2015-01-19 15:16:06 +00:00
Disassembler [mips][microMIPS] MicroMIPS 16-bit unconditional branch instruction B 2015-01-20 16:45:27 +00:00
ELF Produce errors when an assignment expression would use a common symbol. 2015-01-19 17:30:24 +00:00
Hexagon [Hexagon] Updating predicate register transfers and adding tstbit to allow select selection. Updating ll tests with predicate transfers that previously had nop encodings. 2014-12-09 18:16:49 +00:00
MachO Add r224985 back with fixes. 2015-01-19 21:11:14 +00:00
Markup
Mips [mips][microMIPS] MicroMIPS 16-bit unconditional branch instruction B 2015-01-20 16:45:27 +00:00
PowerPC [PowerPC] Add assembler support for mcrfs and friends 2015-01-15 01:00:53 +00:00
R600 R600/SI: Add a stub GCNTargetMachine 2015-01-06 18:00:21 +00:00
Sparc
SystemZ
X86 X86: validate 'int' instruction 2015-01-14 05:10:21 +00:00