6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-12-22 07:32:48 +00:00
Code Issues Projects Releases Wiki Activity
0d7d99fd44
llvm-6502/lib/Target/PowerPC
History
Chris Lattner 0d7d99fd44 1. Refactored handling of integer immediate values for add, or, xor and sub. 
New routine: ISel::SelectIntImmediateExpr
  2. Now checking use counts of large constants.  If use count is > 2 then drop
  thru so that the constant gets loaded into a register.
  Source:

int %test1(int %a) {
entry:
       %tmp.1 = add int %a,      123456789      ; <int> [#uses=1]
       %tmp.2 = or  int %tmp.1,  123456789      ; <int> [#uses=1]
       %tmp.3 = xor int %tmp.2,  123456789      ; <int> [#uses=1]
       %tmp.4 = sub int %tmp.3, -123456789      ; <int> [#uses=1]
       ret int %tmp.4
}

Did Emit:

       .machine ppc970


       .text
       .align  2
       .globl  _test1
_test1:
.LBB_test1_0:   ; entry
       addi r2, r3, -13035
       addis r2, r2, 1884
       ori r2, r2, 52501
       oris r2, r2, 1883
       xori r2, r2, 52501
       xoris r2, r2, 1883
       addi r2, r2, 52501
       addis r3, r2, 1883
       blr


Now Emits:

       .machine ppc970


       .text
       .align  2
       .globl  _test1
_test1:
.LBB_test1_0:   ; entry
       lis r2, 1883
       ori r2, r2, 52501
       add r3, r3, r2
       or r3, r3, r2
       xor r3, r3, r2
       add r3, r3, r2
       blr

Patch by Jim Laskey!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22749 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-10 16:34:52 +00:00
..
.cvsignore
LICENSE.TXT
Makefile
PowerPC.td
PowerPCInstrInfo.h Remove trailing whitespace 2005-04-21 23:30:14 +00:00
PowerPCTargetMachine.h Add Subtarget support to PowerPC. Next up, using it. 2005-08-04 07:12:09 +00:00
PPC32.td
PPC32ISelSimple.cpp Update to use the new MathExtras.h support for log2 computation. 2005-08-02 19:26:06 +00:00
PPC32JITInfo.h update interface 2005-07-22 20:49:37 +00:00
PPC32RegisterInfo.td Use the new subtarget support to automatically choose the correct ABI 2005-08-04 20:49:48 +00:00
PPC64.td
PPC64CodeEmitter.cpp Remove trailing whitespace 2005-04-21 23:30:14 +00:00
PPC64InstrInfo.cpp Remove trailing whitespace 2005-04-21 23:30:14 +00:00
PPC64InstrInfo.h Remove trailing whitespace 2005-04-21 23:30:14 +00:00
PPC64ISelPattern.cpp Update the targets to the new SETCC/CondCodeSDNode interfaces. 2005-08-09 20:21:10 +00:00
PPC64JITInfo.h Remove trailing whitespace 2005-04-21 23:30:14 +00:00
PPC64RegisterInfo.cpp Use the new subtarget support to automatically choose the correct ABI 2005-08-04 20:49:48 +00:00
PPC64RegisterInfo.h Remove trailing whitespace 2005-04-21 23:30:14 +00:00
PPC64RegisterInfo.td Use the new subtarget support to automatically choose the correct ABI 2005-08-04 20:49:48 +00:00
PPC64TargetMachine.h Remove trailing whitespace 2005-04-21 23:30:14 +00:00
PPC.h Consolidate the GPOpt stuff to all use the Subtarget, instead of still 2005-08-05 22:05:03 +00:00
PPCAsmPrinter.cpp Consolidate the GPOpt stuff to all use the Subtarget, instead of still 2005-08-05 22:05:03 +00:00
PPCBranchSelector.cpp Eliminate all remaining tabs and trailing spaces. 2005-07-27 06:12:32 +00:00
PPCCodeEmitter.cpp Eliminate all remaining tabs and trailing spaces. 2005-07-27 06:12:32 +00:00
PPCFrameInfo.h Remove trailing whitespace 2005-04-21 23:30:14 +00:00
PPCInstrBuilder.h Remove trailing whitespace 2005-04-21 23:30:14 +00:00
PPCInstrFormats.td Fix JIT encoding of ppc mfocrf instruction; the operands were reversed 2005-08-08 20:04:52 +00:00
PPCInstrInfo.cpp Remove trailing whitespace 2005-04-21 23:30:14 +00:00
PPCInstrInfo.h Remove trailing whitespace 2005-04-21 23:30:14 +00:00
PPCInstrInfo.td Fix JIT encoding of ppc mfocrf instruction; the operands were reversed 2005-08-08 20:04:52 +00:00
PPCISelPattern.cpp 1. Refactored handling of integer immediate values for add, or, xor and sub. 2005-08-10 16:34:52 +00:00
PPCJITInfo.cpp update interface 2005-07-22 20:49:37 +00:00
PPCJITInfo.h turn off GOT on archs that didn't use it (not that it appeard to harm them much with it on) 2005-07-29 23:32:02 +00:00
PPCRegisterInfo.cpp Use the new subtarget support to automatically choose the correct ABI 2005-08-04 20:49:48 +00:00
PPCRegisterInfo.h Remove trailing whitespace 2005-04-21 23:30:14 +00:00
PPCRegisterInfo.td
PPCRelocations.h Eliminate tabs and trailing spaces. 2005-07-27 05:53:44 +00:00
PPCSubtarget.cpp Consolidate the GPOpt stuff to all use the Subtarget, instead of still 2005-08-05 22:05:03 +00:00
PPCSubtarget.h Consolidate the GPOpt stuff to all use the Subtarget, instead of still 2005-08-05 22:05:03 +00:00
PPCTargetMachine.cpp Consolidate the GPOpt stuff to all use the Subtarget, instead of still 2005-08-05 22:05:03 +00:00
PPCTargetMachine.h Remove trailing whitespace 2005-04-21 23:30:14 +00:00
README.txt add a optimization note 2005-08-09 22:30:57 +00:00

README.txt 

TODO:
* gpr0 allocation
* implement do-loop -> bdnz transform
* implement powerpc-64 for darwin
* use stfiwx in float->int
* be able to combine sequences like the following into 2 instructions:
	lis r2, ha16(l2__ZTV4Cell)
	la r2, lo16(l2__ZTV4Cell)(r2)
	addi r2, r2, 8

* Support 'update' load/store instructions.  These are cracked on the G5, but
  are still a codesize win.

* Add a custom legalizer for the GlobalAddress node, to move the funky darwin
  stub stuff from the instruction selector to the legalizer (exposing low-level
  operations to the dag for optzn.  For example, we want to codegen this:

        int A = 0;
        void B() { A++; }
  as:
        lis r9,ha16(_A)
        lwz r2,lo16(_A)(r9)
        addi r2,r2,1
        stw r2,lo16(_A)(r9)
  not:
        lis r2, ha16(_A)
        lwz r2, lo16(_A)(r2)
        addi r2, r2, 1
        lis r3, ha16(_A)
        stw r2, lo16(_A)(r3)

* should hint to the branch select pass that it doesn't need to print the
  second unconditional branch, so we don't end up with things like:
	b .LBBl42__2E_expand_function_8_674	; loopentry.24
	b .LBBl42__2E_expand_function_8_42	; NewDefault
	b .LBBl42__2E_expand_function_8_42	; NewDefault