llvm-6502/lib/Target/PowerPC/MCTargetDesc/PPCFixupKinds.h
Ulrich Weigand e152eac63e [PowerPC] Merge/rename PPC fixup types
Now that fixup_ppc_ha16 and fixup_ppc_lo16 are being treated exactly
the same everywhere, it no longer makes sense to have two fixup types.

This patch merges them both into a single type fixup_ppc_half16,
and renames fixup_ppc_lo16_ds to fixup_ppc_half16ds for consistency.
(The half16 and half16ds names are taken from the description of
relocation types in the PowerPC ABI.)

No change in code generation expected.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182092 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-17 12:37:21 +00:00

51 lines
1.4 KiB
C++

//===-- PPCFixupKinds.h - PPC Specific Fixup Entries ------------*- C++ -*-===//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_PPC_PPCFIXUPKINDS_H
#define LLVM_PPC_PPCFIXUPKINDS_H
#include "llvm/MC/MCFixup.h"
#undef PPC
namespace llvm {
namespace PPC {
enum Fixups {
// fixup_ppc_br24 - 24-bit PC relative relocation for direct branches like 'b'
// and 'bl'.
fixup_ppc_br24 = FirstTargetFixupKind,
/// fixup_ppc_brcond14 - 14-bit PC relative relocation for conditional
/// branches.
fixup_ppc_brcond14,
/// fixup_ppc_half16 - A 16-bit fixup corresponding to lo16(_foo)
/// or ha16(_foo) for instrs like 'li' or 'addis'.
fixup_ppc_half16,
/// fixup_ppc_half16ds - A 14-bit fixup corresponding to lo16(_foo) with
/// implied 2 zero bits for instrs like 'std'.
fixup_ppc_half16ds,
/// fixup_ppc_tlsreg - Insert thread-pointer register number.
fixup_ppc_tlsreg,
/// fixup_ppc_nofixup - Not a true fixup, but ties a symbol to a call
/// to __tls_get_addr for the TLS general and local dynamic models.
fixup_ppc_nofixup,
// Marker
LastTargetFixupKind,
NumTargetFixupKinds = LastTargetFixupKind - FirstTargetFixupKind
};
}
}
#endif