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e152eac63e
Now that fixup_ppc_ha16 and fixup_ppc_lo16 are being treated exactly the same everywhere, it no longer makes sense to have two fixup types. This patch merges them both into a single type fixup_ppc_half16, and renames fixup_ppc_lo16_ds to fixup_ppc_half16ds for consistency. (The half16 and half16ds names are taken from the description of relocation types in the PowerPC ABI.) No change in code generation expected. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182092 91177308-0d34-0410-b5e6-96231b3b80d8
51 lines
1.4 KiB
C++
51 lines
1.4 KiB
C++
//===-- PPCFixupKinds.h - PPC Specific Fixup Entries ------------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_PPC_PPCFIXUPKINDS_H
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#define LLVM_PPC_PPCFIXUPKINDS_H
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#include "llvm/MC/MCFixup.h"
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#undef PPC
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namespace llvm {
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namespace PPC {
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enum Fixups {
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// fixup_ppc_br24 - 24-bit PC relative relocation for direct branches like 'b'
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// and 'bl'.
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fixup_ppc_br24 = FirstTargetFixupKind,
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/// fixup_ppc_brcond14 - 14-bit PC relative relocation for conditional
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/// branches.
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fixup_ppc_brcond14,
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/// fixup_ppc_half16 - A 16-bit fixup corresponding to lo16(_foo)
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/// or ha16(_foo) for instrs like 'li' or 'addis'.
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fixup_ppc_half16,
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/// fixup_ppc_half16ds - A 14-bit fixup corresponding to lo16(_foo) with
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/// implied 2 zero bits for instrs like 'std'.
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fixup_ppc_half16ds,
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/// fixup_ppc_tlsreg - Insert thread-pointer register number.
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fixup_ppc_tlsreg,
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/// fixup_ppc_nofixup - Not a true fixup, but ties a symbol to a call
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/// to __tls_get_addr for the TLS general and local dynamic models.
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fixup_ppc_nofixup,
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// Marker
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LastTargetFixupKind,
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NumTargetFixupKinds = LastTargetFixupKind - FirstTargetFixupKind
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};
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}
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}
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#endif
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